X80013 datasheet(5/25 Pages) INTERSIL

Part #	X80013

Description	Penta-Power Sequence Controller with Hot swap and System Management

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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5 / 25 page

5

FN8149.0

January 13, 2005

Equivalent A.C. Output Load Circuit

tRESET_E Delay from PWRGD or ViGOOD to RESET

valid LOW

1

µs

tQC

Delay from IGQ1 and IGQ0 to valid Gate pin

current

1

µs

tSC_RETRY Delay between Retries

85

100

115

ms

tNF

Noise Filter for Overcurrent

4.5

5

5.5

µs

tDPOR

Device Delay before Gate assertion

45

50

55

ms

tSPOR

Delay after PWRGD and all ViGOOD signals

are active before RESET assertion

85

100

115

ms

tDELAY1

Power Sequencing Time Delay

TiD1 = 0; TiD0 = 0

85

100

115

ms

tDELAY2

tDELAY3

tDELAY4

tTO

ViGOOD turn off time

50

ns

tPDHLPG(1) Delay from Drain good to PWRGD LOW

Gate = VDD

1

µs

tPDLHPG(1) Delay from Drain fail to PWRGD HIGH

Gate = VDD

1

µs

tPGHLPG(1) Delay from Gate good to PWRGD LOW

Drain = VEE

1

µs

tPGLHPG(1) Delay from Gate fail to PWRGD HIGH

Drain = VEE

1

µs

NOTE:

1. This parameter is based on characterization data.

Electrical Specifications

(Standard Settings)

Over the recommended operating conditions unless otherwise specified. (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

A.C. Test Conditions

Input pulse levels

VCC x 0.1 to VCC x 0.9

Input rise and fall times

10ns

Input and output timing levels

VCC x 0.5

Output load

Standard output load

4.6k

Ω

RESET

30pF

V1GOOD,

5V

4.6k

Ω

30pF

V2GOOD,

V3GOOD,

V4GOOD

FAR

5V

PWRGD

X80010, X80011, X80012, X80013

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X80013 Datasheet(PDF) 5 Page - Intersil Corporation

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