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AT90S8535 Datasheet(PDF) 63 Page - ATMEL Corporation |
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AT90S8535 Datasheet(HTML) 63 Page - ATMEL Corporation |
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63 / 127 page  63 AT90S/LS8535 1041H–11/01 The FE bit is cleared when the stop bit of received data is one. • Bit 3 – OR: OverRun This bit is set if an Overrun condition is detected, i.e., when a character already present in the UDR register is not read before the next character has been shifted into the Receiver Shift register. The OR bit is buffered, which means that it will be set once the valid data still in UDR is read. The OR bit is cleared (zero) when data is received and transferred to UDR. • Bits 2..0 – Res: Reserved Bits These bits are reserved bits in the AT90S8535 and will always read as zero. UART Control Register – UCR • Bit 7 – RXCIE: RX Complete Interrupt Enable When this bit is set (one), a setting of the RXC bit in USR will cause the Receive Com- plete Interrupt routine to be executed provided that global interrupts are enabled. • Bit 6 – TXCIE: TX Complete Interrupt Enable When this bit is set (one), a setting of the TXC bit in USR will cause the Transmit Com- plete Interrupt routine to be executed provided that global interrupts are enabled. • Bit 5 – UDRIE: UART Data Register Empty Interrupt Enable When this bit is set (one), a setting of the UDRE bit in USR will cause the UART Data Register Empty Interrupt routine to be executed provided that global interrupts are enabled. • Bit 4 – RXEN: Receiver Enable This bit enables the UART receiver when set (one). When the receiver is disabled, the RXC, OR and FE status flags cannot become set. If these flags are set, turning off RXEN does not cause them to be cleared. • Bit 3 – TXEN: Transmitter Enable This bit enables the UART transmitter when set (one). When disabling the transmitter while transmitting a character, the transmitter is not disabled before the character in the shift register plus any following character in UDR has been completely transmitted. • Bit 2 – CHR9: 9 Bit Characters When this bit is set (one), transmitted and received characters are 9 bits long, plus start and stop bits. The ninth bit is read and written by using the RXB8 and TXB8 bits in UCR, respectively. The ninth data bit can be used as an extra stop bit or a parity bit. • Bit 1 – RXB8: Receive Data Bit 8 When CHR9 is set (one), RXB8 is the ninth data bit of the received character. • Bit 0 – TXB8: Transmit Data Bit 8 When CHR9 is set (one), TXB8 is the ninth data bit in the character to be transmitted. Bit 765 432 10 $0A ($2A) RXCIE TXCIE UDRIE RXEN TXEN CHR9 RXB8 TXB8 UCR Read/Write R/W R/W R/W R/W R/W R/W R W Initial Value 0 0 0 0 0 0 1 0 |
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