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AT90S8535 Datasheet(PDF) 18 Page - ATMEL Corporation |
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AT90S8535 Datasheet(HTML) 18 Page - ATMEL Corporation |
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18 / 127 page  18 AT90S/LS8535 1041H–11/01 Note: Reserved and unused locations are not shown in the table. All AT90S8535 I/Os and peripherals are placed in the I/O space. The I/O locations are accessed by the IN and OUT instructions transferring data between the 32 general-pur- pose working registers and the I/O space. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set section for more details. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O registers as SRAM, $20 must be added to these addresses. All I/O register addresses throughout this document are shown with the SRAM address in parentheses. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. Some of the status flags are cleared by writing a logical “1” to them. Note that the CBI and SBI instructions will operate on all bits in the I/O register, writing a “1” back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only. The I/O and peripherals control registers are explained in the following sections. $17 ($37) DDRB Data Direction Register, Port B $16 ($36) PINB Input Pins, Port B $15 ($35) PORTC Data Register, Port C $14 ($34) DDRC Data Direction Register, Port C $13 ($33) PINC Input Pins, Port C $12 ($32) PORTD Data Register, Port D $11 ($31) DDRD Data Direction Register, Port D $10 ($30) PIND Input Pins, Port D $0F ($2F) SPDR SPI I/O Data Register $0E ($2E) SPSR SPI Status Register $0D ($2D) SPCR SPI Control Register $0C ($2C) UDR UART I/O Data Register $0B ($2B) USR UART Status Register $0A ($2A) UCR UART Control Register $09 ($29) UBRR UART Baud Rate Register $08 ($28) ACSR Analog Comparator Control and Status Register $07 ($27) ADMUX ADC Multiplexer Select Register $06 ($26) ADCSR ADC Control and Status Register $05 ($25) ADCH ADC Data Register High $04 ($24) ADCL ADC Data Register Low Table 1. AT90S8535 I/O Space (Continued) I/O Address (SRAM Address) Name Function |
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