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X40420V14-B Datasheet(PDF) 3 Page - Intersil Corporation |
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X40420V14-B Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 25 page 3 March 28, 2005 6 RESET/ RESET RESET Output. (X40421) This open drain pin is an active LOW output which goes LOW whenever VCC falls below VTRIP1 voltage or if manual reset is asserted. This output stays active for the pro- grammed time period (tPURST) on power-up. It will also stay active until manual reset is released and for tPURST thereafter. RESET Output. (X40420) This pin is an active HIGH open drain output which goes HIGH whenever VCC falls below VTRIP1 voltage or if manual reset is asserted. This output stays active for the pro- grammed time period (tPURST) on power-up. It will also stay active until manual reset is released and for tPURST thereafter. 7VSS Ground 8SDA Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. This pin requires a pull up resistor and the input buffer is always active (not gated). Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this transition within the watchdog time out period results in WDO going active. 9SCL Serial Clock. The Serial Clock controls the serial bus timing for data input and output. 10 WP Write Protect. WP HIGH prevents writes to any location in the device (including all the registers). It has an internal pull down resistor. (>10M Ω typical) 11 VBATT Battery Supply Voltage. This input provides a backup supply in the event of a failure of the primary VCC voltage. The VBATT voltage typically provides the supply voltage necessary to maintain the contents of SRAM and also powers the internal logic to “stay awake.” If the battery is not used, connect VBATT to ground. 12 VOUT Output Voltage. (V) VOUT = VCC if VCC > VTRIP1. IF VCC < VTRIP1 then VOUT = VCC if VCC > VBATT + 0.03V else VOUT = VBATT (ie if VCC < VBATT - 0.03V) Note: There is hysteresis around VBATT ± 0.03V point to avoid oscillation at or near the switchover voltage. A capacitance of 0.1µF must be connected to VOUT to ensure stability. 13 BATT-ON Battery On. This CMOS output goes HIGH when the VOUT switches to VBATT and goes LOW when VOUT switches to VCC. It is used to drive an external PNP pass transistor when VCC = VOUT and current requirements are greater than 50mA. The purpose of this output is to drive an external transistor to get higher operating currents when the VCC supply is fully functional. In the event of a VCC failure, the battery voltage is applied to the VOUT pin and the external transistor is turned off. In this “backup condition,” the battery only needs to supply enough voltage and current to keep SRAM devices from losing their data–there is no communication at this time. 14 VCC Supply Voltage PIN DESCRIPTION (Continued) Pin Name Function X40420, X40421 |
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