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X45620 Datasheet(PDF) 6 Page - Intersil Corporation

Part No. X45620
Description  Dual Voltage Monitor with Integrated System Battery Switch and EEPROM
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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X45620 Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN8250.0
July 29, 2005
A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified)
Read & Write Cycle Limits
Serial Output Timing
POWER-UP TIMING (5)
Notes: (5) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These parameters are
not 100% tested.
(6) Typical values are for TA = 25°C and nominal supply voltage (5V)
(7) Cb = total capacitance of one bus line in pF.
Bus Timing
Symbol
Parameter
Min
Max
Unit
Test Conditions
fSCL
SCL clock frequency
400
kHz
tIN
Pulse width suppression time at inputs
50
ns
Note 4
tAA
SCL LOW to SDA Data Out Valid
0.1
0.9
µs
Note 4
tBUF
Time the bus must be free before a new transmission can start
1.3
µs
Note 4
tLOW
Clock LOW period
1.3
µs
Note 4
tHIGH
Clock HIGH period
0.6
µs
Note 4
tSU:STA
Start condition setup time
0.6
µs
tHD:STA
Start condition hold time
0.6
µs
tSU:DAT
Data in setup time
100
ns
Note 4
tHD:DAT
Data in hold time
0
µs
Note 4
tSU:STO
Stop condition setup time
0.6
µs
Note 4
tDH
Data output hold time
50
ns
Note 4
Symbol
Parameter
Min
Max
Unit
Test Conditions
tR
SDA and SCL rise time
20 + .1Cb
300
ns
Note 4
tF
SDA and SCL fall time
20 + .1Cb
300
ns
Note 4
tSU:S0, S1, WP
S0, S1, and WP Setup Time
0.6
ns
Note 4
tHD:S0, S1, WP
S0, S1, and WP Hold Time
0
ns
Note 4
Cb
Capacitive load for each bus line
400
pF
Note 4, 7
Symbol
Parameter
Max
Unit
Test Conditions
tPUR
Power-up to Read Operation
1
ms
Note 4
tPUW
Power-up to Write Operation
5
ms
Note 4
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
tLOW
t SU:STO
tR
tBUF
SCL
SDA IN
SDA OUT
tDH
tAA
tF
tHIGH
X45620


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