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X9530B15I-T1 Datasheet(PDF) 7 Page - Intersil Corporation |
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X9530B15I-T1 Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 30 page  7 FN8211.0 March 10, 2005 I2FSO1–I2FSO0: CURRENT GENERATOR 2 FULL SCALE OUTPUT CURRENT SET BITS (NON-VOLATILE) These two bits are used to set the full scale output current at the Current Generator 2 pin, I2. If both bits are set to “0” (default), an external resistor connected between pin R2 and Vss, determines the full scale output current available at pin I2. The other three options are indicated in the table below. The direction of this current is set by bit I2DS in Control Register 0. *No external resistor should be connected in these cases between R2 and VSS. L1DAS: LUT1 DIRECT ACCESS SELECT BIT (NON- VOLATILE ) When bit L1DAS is set to “0” (default), LUT1 is addressed by the output of the on-chip A/D converter. When bit L1DAS is set to “1”, LUT1 is addressed by bits L1DA5 - L1DA0. D1DAS: D/A 1 DIRECT ACCESS SELECT BIT (NON- VOLATILE ) When bit D1DAS is set to “0” (default), the input to the D/A converter 1 is a row of LUT1. When bit D1DAS is set to “1”, that input is the content of the Control register 3. L2DAS: LUT2 DIRECT ACCESS SELECT BIT (NON- VOLATILE ) When bit L2DAS is set to “0” (default), LUT2 is addressed by the output of the on-chip A/D converter. When bit L2DAS is set to “1”, LUT2 is addressed by bits L2DA5 - L2DA0. D2DAS: D/A 2 DIRECT ACCESS SELECT BIT (NON- VOLATILE ) When bit D2DAS is set to “0” (default), the input to the D/A converter 2 is a row of LUT2. When bit D2DAS is set to “1”, that input is the content of the Control register 4. Control Register 6 This register is accessed by performing a Read or Write operation to address 86h of memory. WEL: WRITE ENABLE LATCH (VOLATILE) The WEL bit controls the Write Enable status of the entire X9530 device. This bit must be set to “1” before any other Write operation (volatile or nonvolatile). Otherwise, any proceeding Write operation to memory is aborted and no ACK is issued after a Data Byte. The WEL bit is a volatile latch that powers up in the “0” state (disabled). The WEL bit is enabled by writing 100000002 to Control register 6. Once enabled, the WEL bit remains set to “1” until the X9530 is powered down, and then up again, or until it is reset to “0” by writing 000000002 to Control register 6. A Write operation that modifies the value of the WEL bit will not cause a change in other bits of Control register 6. Status Register - ADC Output This register is accessed by performing a Read operation to address 87h of memory. AD5 - AD0: A/D CONVERTER OUTPUT BITS (READ ONLY ) These six bits are the binary output of the on-chip A/D converter. The output is 0000002 for minimum input and 1111112 for full scale input. I2FSO1 I2FSO0 I2 Full Scale Output Current 0 0 Set externally via pin R2 (Default) 01 ±0.4mA* 10 ±0.85 mA* 11 ±1.3 mA* X9530 |
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