Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN74ALVC16374

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS258A – JANUARY 1993 – REVISED MAY 1995

1

POST OFFICE BOX 655303

Widebus

™ Family

CMOS) Submicron Process

Need for External Pullup/Pulldown

Resistors

MIL-STD-833C, Method 3015; Exceeds

200 V Using Machine Model (C = 200 pF,

R = 0)

Per JEDEC Standard JESD-17

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

description

This 16-bit edge-triggered D-type flip-flop is

The SN74ALVC16374 is particularly suitable

for implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On

the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the

data (D) inputs. OE) can be used to place the eight outputs in either a normal logic state (high- or low-logic levels)

or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without

need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be

retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVC16374 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)

packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the

same printed-circuit-board area.

The SN74ALVC16374 is characterized for operation from – 40

°C to 85°C.

DGG OR DL PACKAGE

(TOP VIEW)

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1OE

1Q1

1Q2

GND

1Q3

1Q4

1Q5

1Q6

GND

1Q7

1Q8

2Q1

2Q2

GND

2Q3

2Q4

2Q5

2Q6

GND

2Q7

2Q8

2OE

1CLK

1D1

1D2

GND

1D3

1D4

1D5

1D6

GND

1D7

1D8

2D1

2D2

GND

2D3

2D4

2D5

2D6

GND

2D7

2D8

2CLK

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

© 1995, Texas Instruments Incorporated

EPIC and Widebus are trademarks of Texas Instruments Incorporated.