1

®

FN8158.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil Americas INC. Copyright Intersil Americas Inc. 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

X9110

Dual Supply/Low Power/1024-Tap/SPI Bus

Single Digitally-Controlled (XDCP™)

Potentiometer

The X9110 integrates a single digitally controlled

potentiometer (XDCP) on a monolithic CMOS integrated

circuit.

The digital controlled potentiometer is implemented using

1023 resistive elements in a series array. Between each

element are tap points connected to the wiper terminal

through switches. The position of the wiper on the array is

controlled by the user through the SPI bus interface. The

potentiometer has associated with it a volatile Wiper Counter

Register (WCR) and four non-volatile Data Registers that

can be directly written to and read by the user. The contents

of the WCR controls the position of the wiper on the resistor

array though the switches. Power-up recalls the contents of

the default data register (DR0) to the WCR.

The XDCP can be used as a three-terminal potentiometer or

as a two terminal variable resistor in a wide variety of

applications including control, parameter adjustments, and

signal processing.

Features

• 1024 Resistor Taps – 10-Bit Resolution

• SPI Serial Interface for write, read, and transfer operations

of the potentiometer

• Wiper Resistance, 40

Ω Typical @ 5V

• Four Non-Volatile Data Registers

• Non-Volatile Storage of Multiple Wiper Positions

• Power-on Recall. Loads Saved Wiper Position on Power-up

• Standby Current < 3µA Max

• Analog V+/V-: -5V to +5V

•100k

Ω End to End Resistance

• 100 yr. Data Retention

• Endurance: 100, 000 Data Changes Per Bit Per Register

• 14 Ld TSSOP

• Dual Supply Version of the X9111

• Low Power CMOS

• Pb-Free Plus Anneal Available (RoHS Compliant)

Pinout

X9110

14 LD TSSOP

TOP VIEW

Functional Diagram

VSS

1

2

3

4

5

6

7

8

14

13

12

11

10

9

A0

SCK

CS

S0

V+

SI

HOLD

WP

V-

BUS

INTERFACE &

CONTROL

POT

SPI

BUS

ADDRESS

DATA

STATUS

WRITE

READ

WIPER

1024-TAPS

TRANSFER

NC

NC

100k

Ω

POWER-ON RECALL

WIPER COUNTER

REGISTER (WCR)

DATA REGISTERS

(DR0-DR3)

CONTROL

INTERFACE

V+

V-

Data Sheet

October 7, 2005