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X1227 Datasheet(PDF) 3 Page - Intersil Corporation

Part # X1227
Description  2-Wire RTC Real TimeClock/Calendar/CPU Supervisor with EEPROM
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X1227 Datasheet(HTML) 3 Page - Intersil Corporation

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3
FN8099.1
September 15, 2005
PIN DESCRIPTIONS
PIN ASSIGNMENTS
Pin Number
Symbol
Brief Description
SOIC
TSSOP
13
X1
X1. The X1 pin is the input of an inverting amplifier and should be connected to one
pin of a 32.768kHz quartz crystal.
24
X2
X2. The X2 pin is the output of an inverting amplifier and should be connected to
one pin of a 32.768kHz quartz crystal..
35
RESET
Reset Output – RESET.
This is a reset signal output. This signal notifies a host
processor that the watchdog time period has expired or that the voltage has
dropped below a fixed VTRIP threshold. It is an open drain active LOW output.
46
VSS
VSS.
57
SDA
Serial Data (SDA). SDA is a bidirectional pin used to transfer data into and out of
the device. It has an open drain output and may be wire ORed with other open drain
or open collector outputs.
68
SCL
Serial Clock (SCL). The SCL input is used to clock all data into and out of the
device. The input buffer on this pin is always active (not gated).
71
VBACK
VBACK. This input provides a backup supply voltage to the device. VBACK supplies
power to the device in the event the VCC supply fails. This pin can be connected to
a battery, a Supercap or tied to ground if not used.
82
VCC
VCC.
NC = No internal connection
X1227
X1
X2
VBACK
VCC
RESET
SCL
SDA
VSS
1
2
3
4
7
8
6
5
8-Pin TSSOP
X1227
X1
X2
VBACK
VCC
RESET
SCL
SDA
VSS
1
2
3
4
7
8
6
5
8-Pin SOIC
X1227


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