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X9C503SIZ Datasheet(PDF) 6 Page - Intersil Corporation

Part # X9C503SIZ
Description  Digitally Controlled Pot (XDCP)
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9C503SIZ Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN8222.1
September 19, 2005
A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified)
POWER-UP AND DOWN REQUIREMENTS
At all times, voltages on the potentiometer pins must be less than ±VCC. The recall of the wiper position from nonvola-
tile memory is not in effect until the VCC supply reaches its final value. The VCC ramp rate spec is always in effect.
A.C. TIMING
Notes: (6) Typical values are for TA = 25°C and nominal supply voltage.
(7) This parameter is periodically sampled and not 100% tested.
(8) MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position.
Symbol
Parameter
Limits
Unit
Min.
Typ.(6)
Max.
tCl
CS to INC setup
100
ns
tlD
INC HIGH to U/D change
100
ns
tDI
U/D to INC setup
2.9
µs
tlL
INC LOW period
1
µs
tlH
INC HIGH period
1
µs
tlC
INC inactive to CS inactive
1
µs
tCPH
CS deselect time (STORE)
20
ms
tCPH
CS deselect time (NO STORE)
100
ns
tIW
INC to VW/RW change
100
500
µs
tCYC
INC cycle time
4
µs
tR, tF(7)
INC input rise and fall time
500
µs
tPU(7)
Power-up to wiper stable
500
µs
tR VCC(7)
VCC power-up rate
0.2
50
V/ms
CS
INC
U/D
VW
tCI
tIL
tIH
tCYC
tID
tDI
tIW
MI
(8)
tIC
tCPH
tF
tR
10%
90%
90%
X9C102, X9C103, X9C104, X9C503


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