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SN74HCS14 Datasheet(PDF) 7 Page - Texas Instruments |
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SN74HCS14 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 15 page ![]() One of Six Channels xA xY 7 SN74HCS14 www.ti.com SCLS799 – JANUARY 2020 Product Folder Links: SN74HCS14 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview This device contains six independent Inverter with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Balanced CMOS Push-Pull Outputs A balanced output allows the device to sink and source similar currents. The drive capability of this device may create fast edges into light loads so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the output power of the device to be limited to avoid damage due to over- current. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all times. 8.3.2 CMOS Schmitt-Trigger Inputs Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the Electrical Characteristics, using ohm's law (R = V ÷ I). The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the inputs slowly will also increase dynamic current consumption of the device. For additional information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers. 8.3.3 Clamp Diode Structure The inputs and outputs to this device have both positive and negative clamping diodes as depicted in Figure 8. CAUTION Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. |
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