ISL6729IB datasheet(4/8 Pages) INTERSIL

Part #	ISL6729IB

Description	Low-Cost Single-Ended Current-Mode PWM for Microcontroller Based Power Converters

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Manufacturer	INTERSIL [Intersil Corporation]

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Absolute Maximum Ratings

Thermal Information

Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +6.5V

OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD + 0.3V

Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.5V

Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A

ESD Classification

Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2000V

Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V

Operating Conditions

Temperature Range

ISL6729Ix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C

Supply Voltage Range (Typical)

ISL6729 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V-5.25V

Thermal Resistance (Typical, Note 1)

θJA (°C/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

100

MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .

130

Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C

Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

(SOIC- Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1.

θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

2. All voltages are with respect to GND.

Electrical Specifications

Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

schematic. VDD = 5V, CLK = 50kHz, TA = -40 to 105°C (Note 3), Typical values are at TA = 25°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

UNDERVOLTAGE LOCKOUT

START Threshold

4.15

4.50

4.75

V

STOP Threshold

4.00

4.30

4.60

Hysteresis

-0.2

-

V

Start-Up Current, IDD

VDD < START Threshold

-

420

800

µA

Operating Current, IDD

(Note 4)

-

3.3

5.5

mA

Operating Supply Current, ID

Includes 1nF GATE loading

-

4.1

6.0

mA

CURRENT SENSE

Input Bias Current

VCS = 1V

-1.0

-

1.0

µA

CS Offset Voltage

VCS = 0V (Note 5)

95

100

105

mV

COMP to PWM Comparator Offset Voltage

VCS = 0V (Note 5)

0.80

1.15

1.30

V

CS Input Signal, Maximum

0.91

0.97

1.03

V

Gain, ACS = ∆VCOMP/∆VCS

0 < VCS < 910mV, VFB = 0V. (Note 5)

2.5

3.0

3.5

V/V

CS to OUT Delay

(Note 5)

-

25

40

ns

CLOCK

Input High Voltage Level, VIH

-

2.8

-

V

Input Low Voltage Level, VIL

-

2.7

-

V

Maximum Clock Rate

(Note 5)

2

-

MHz

OUTPUT

Gate VOH

VDD - OUT, IOUT = -200mA

-

1.0

2.0

V

Gate VOL

OUT - GND, IOUT = 200mA

-

1.0

2.0

V

Peak Output Current

COUT = 1nF (Note 5)

1.0

-

A

Rise Time

COUT = 1nF (Note 5)

-

20

40

ns

Fall Time

COUT = 1nF (Note 5)

-

20

40

ns

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