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M5M5V216ATP Datasheet(PDF) 4 Page - Mitsubishi Electric Semiconductor

Part No. M5M5V216ATP
Description  2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M5M5V216ATP Datasheet(HTML) 4 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI ELECTRIC
M5M5V216ATP,RT
revision-01, ' 98.12.08
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
4
AC ELECTRICAL CHARACTERISTICS (Vcc=2.7 ~ 3.6V, unless otherwise noted)
1TTL
CL
DQ
Input rise time and fall time
Reference level
Output loads
2.7V~3.6V
VIH=2.2V,VIL=0.4V
VOH=VOL=1.5V
Transition is measured ±500mV from
steady state voltage.(for ten,tdis)
5ns
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
(1) TEST CONDITIONS
Supply voltage
Input pulse
Fig.1 Output load
Including scope and
jig capacitance
Output disable time after S high
tCR
ns
ta(S)
ta(OE)
tdis(S)
tdis(OE)
ten(S)
ten(OE)
tV(A)
ta(A)
70
10
35
ns
ns
ns
ns
ns
ns
ns
ns
(2) READ CYCLE
Symbol
Parameter
Limits
Units
Max
Min
Read cycle time
Address access time
Chip select access time
Output enable access time
Data valid time after address
ta(BC1)
ta(BC2)
Byte control 1 access time
Byte control 2 access time
tdis(BC1)
tdis(BC2)
Output disable time after BC1 high
Output disable time after BC2 high
Output disable time after OE high
ten(BC1)
ten(BC2)
Output enable time after BC1 low
Output enable time after BC2 low
Output enable time after S low
Output enable time after OE low
ns
ns
ns
ns
ns
ns
70
70
70
70
25
25
25
25
10
10
5
10
(3) WRITE CYCLE
tsu(A-WH)
tCW
tw(W)
tsu(A)
tsu(S)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
Chip select setup time
ns
70
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
Parameter
Limits
Units
Max
Min
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to W
Byte control 1 setup time
Data setup time
Data hold time
Write recovery time
Output disable time from OE high
Output enable time from W high
Output disable time from W low
Output enable time from OE low
ns
ns
ns
ns
ns
55
0
65
25
25
5
5
tsu(BC1)
tsu(BC2)
Byte control 2 setup time
65
65
65
30
0
0
55
10
30
Max
Min
55
55
55
55
20
20
20
20
10
10
5
10
M5M5V216ATP,RT - 70
M5M5V216ATP,RT - 55
55
Max
Min
45
0
50
20
20
5
5
50
50
50
25
0
0
M5M5V216ATP,RT - 70
M5M5V216ATP,RT - 55


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