DM9601 datasheet(11/58 Pages) ETC1

Part #	DM9601

Description	USB Ethernet MAC Controller with Intergrated 10/100 PHY

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DM9601

USB to Ethernet MAC Controller with Integrated 10/100 PHY

Final

11

Version: DM9601-DS-F01

June 22, 2002

7.2 Memory Type

These kinds of commands are valid when the bit

“MEM_MODE “ is set, otherwise the device will

respond with request error when receiving these

commands.

READ_MEMORY( )

Setup Stage

BmReqType

Breq

Wvalue

Windex

wLength

Byte 0

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

C0H

02H

00H

MemOff[7:0]

MemOff[15:8]

BC[7:0]

00H

WRITE_MEMORY( )

Setup Stage

BmReqType BReq

Wvalue

Windex

wLength

Byte 0

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

40H

05H

00H

MemOff[7:0]

MemOff[15:8]

BC[7:0]

00H

WRITE1_MEMORY( )

Setup Stage

BmReqType Breq

Wvalue

Windex

wLength

Byte 0

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

40H

07H

Data[7:0]

00H

MemOff[7:0]

MemOff[15:8]

0000H

Note:

There are advantages (for USB 1.1) when we define

“WRITE_XXXXX” and “WRITER1_XXXXX” as two

different commands. There will be only “set up stage”

and “status stage”, but no “data stage” in USB bus for

WRITE1_XXXXX command.

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