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LTC2439-1 Datasheet(PDF) 13 Page - Linear Technology

Part # LTC2439-1
Description  8-/16-Channel 16-Bit No Latency Delta-Sigma ADC
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2439-1 Datasheet(HTML) 13 Page - Linear Technology

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LTC2439-1
13
24391f
APPLICATIO S I FOR ATIO
Table 3. LTC2439-1 Output Data Format
Differential Input Voltage
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 0
VIN*
EOC
DMY
SIG
MSB
VIN* ≥ 0.5 • VREF**
0
0110
0
0
0
0.5 • VREF** – 1LSB
0
0101
1
1
1
0.25 • VREF**
0
0101
0
0
0
0.25 • VREF** – 1LSB
0
0100
1
1
1
0
0
0100
0
0
0
–1LSB
0
0011
1
1
1
– 0.25 • VREF**
0
0011
0
0
0
– 0.25 • VREF** – 1LSB
0
0010
1
1
1
– 0.5 • VREF**
0
0010
0
0
0
VIN* < –0.5 • VREF**
0
0001
1
1
1
*The differential input voltage VIN = IN+ – IN.
**The differential reference voltage VREF = REF+ – REF.
Table 4. LTC2439-1 State Duration
State
Operating Mode
Duration
CONVERT
Internal Oscillator
FO = LOW
147ms, Output Data Rate
≤ 6.8 Readings/s
Simultaneous 50Hz/60Hz Rejection
External Oscillator
FO = External Oscillator
20510/fEOSCs, Output Data Rate ≤ fEOSC/20510 Readings/s
with Frequency fEOSC kHz
(fEOSC/2560 Rejection)
SLEEP
As Long As CS = HIGH Until CS = LOW and SCK
DATA OUTPUT
Internal Serial Clock
FO = LOW
As Long As CS = LOW But Not Longer Than 1.09ms
(Internal Oscillator)
(19 SCK cycles)
FO = External Oscillator with
As Long As CS = LOW But Not Longer Than 152/fEOSCms
Frequency fEOSC kHz
(19 SCK cycles)
External Serial Clock with
As Long As CS = LOW But Not Longer Than 19/fSCKms
Frequency fSCK kHz
(19 SCK cycles)
In the Internal SCK mode of operation, the SCK pin is an
output and the LTC2439-1 creates its own serial clock by
dividing the internal conversion clock by 8. In the External
SCK mode of operation, the SCK pin is used as input. The
Internal or External SCK mode is selected on power-up and
then reselected every time a HIGH-to-LOW transition is de-
tected at the CS pin. If SCK is HIGH or floating at power-
up or during this transition, the converter enters the internal
SCK mode. If SCK is LOW at power-up or during this tran-
sition, the converter enters the external SCK mode.
Serial Data Input (SDI)
The serial data input pin, SDI (Pin 20), is used to shift in the
channel control bits during the data output state to prepare
the channel selection for the following conversion.
SERIAL INTERFACE PINS
The LTC2439-1 transmits the conversion results and re-
ceives the start of conversion command through a syn-
chronous 4-wire interface. During the conversion and sleep
states, this interface can be used to assess the converter
status and during the data I/O state it is used to read the
conversion result and write in channel selection bits.
Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 18) is used to
synchronize the data transfer. Each bit of data is shifted out
the SDO pin on the falling edge of the serial clock and each
input bit is shifted in the SDI pin on the rising edge of the
serial clock.


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