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CD54HC4520 Datasheet(PDF) 6 Page - Texas Instruments

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Part No. CD54HC4520
Description  High-Speed CMOS Logic Dual Synchronous Counters
Download  13 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54HC4520 Datasheet(HTML) 6 Page - Texas Instruments

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6
HCT TYPES
Propagation Delay
CP to Qn
tPLH,
tPHL
CL = 50pF
4.5
-
-
53
-
66
-
80
ns
CL = 15pF
5
-
22
-
-
-
-
-
ns
Enable to Qn
tPLH,
tPHL
CL = 50pF
4.5
-
-
55
-
69
-
83
ns
CL = 15pF
5
-
23
-
-
-
-
-
ns
MR to Qn
tPLH,
tPHL
CL = 50pF
4.5
-
-
35
-
44
-
53
ns
CL = 15pF
5
-
14
-
-
-
-
-
ns
Output Transition Time
tTHL,tTLH
CL = 50pF
4.5
-
-
15
-
19
-
22
ns
Input Capacitance
CIN
CL = 50pF
-
-
-
10
-
10
-
10
pF
Maximum Clock Frequency
fMAX
CL = 15pF
5
-
50
-
-
-
-
-
MHz
Power Dissipation Capacitance
(Note 3,4)
CPD
-5
-
33
-
-
-
-
-
pF
NOTES:
3. CPD is used to determine the dynamic power consumption, per counter.
4. PD = VCC
2 f
i (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Switching Specifications Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO
85oC
-55oC TO 125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Timing Diagram
FIGURE 1.
CLOCK
ENABLE
MASTER RESET
HC4518
’HC/HCT4520
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
123456789
0
1
23456789
0
123456789 10 11 12 13 14 15
0123 4
CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520


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