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CD54HC4520 Datasheet(PDF) 5 Page - Texas Instruments

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Part No. CD54HC4520
Description  High-Speed CMOS Logic Dual Synchronous Counters
Download  13 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54HC4520 Datasheet(HTML) 5 Page - Texas Instruments

 
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5
Set-up Time,
Enable to CP
tSU
2
80
-
-
100
-
120
-
ns
4.5
16
-
-
20
-
24
-
ns
6
14
-
-
17
-
20
-
ns
Removal Time,
MR to CP
tREM
2
0
-
-
0-0-
ns
4.5
0
-
-
0
-
0
-
ns
6
0
-
-
0-0-
ns
Set-up Time,
CP to Enable
tSU
2
80
-
-
100
-
120
-
ns
4.5
16
-
-
20
-
24
-
ns
6
14
-
-
17
-
20
-
ns
Removal Time,
MR to Enable
tREM
2
0
-
-
0-0-
ns
4.5
0
-
-
0
-
0
-
ns
6
0
-
-
0-0-
ns
HCT TYPES
Maximum Clock
Frequency
fMAX
4.5
25
-
-
20
-
17
-
MHz
Clock Pulse Width
tW
4.5
20
-
-
25
-
30
-
ns
MR Pulse Width
tW
4.5
20
-
-
25
-
30
-
ns
Set-up Time,
Enable to CP
tSU
4.5
16
-
-
20
-
24
-
ns
Removal Time,
MR tp Enable
tREM
4.5
0
-
-
0
-
0
-
ns
Switching Specifications Input tr, tf = 6ns
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO
85oC
-55oC TO 125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
Propagation Delay
tPLH,
tPHL
CL = 50pF
2
-
-
240
-
300
-
360
ns
CP to Qn
CL = 50pF
4.5
-
-
48
-
60
-
72
ns
CL = 15pF
5
-
20
-
-
-
-
-
ns
CL = 50pF
6
-
-
41
-
51
-
61
ns
Enable to Qn
tPLH,
tPHL
CL = 50pF
2
-
-
240
-
300
-
360
ns
CL = 50pF
4.5
-
-
48
-
60
-
72
ns
CL = 15pF
5
-
20
-
-
-
-
-
ns
CL = 50pF
6
-
-
41
-
51
-
61
ns
MR to Qn
tPLH,
tPHL
CL = 50pF
2
-
-
150
-
190
-
225
ns
CL = 50pF
4.5
-
-
30
-
38
-
45
ns
CL = 15pF
5
-
12
-
-
-
-
-
ns
CL = 50pF
6
-
-
26
-
33
-
38
ns
Output Transition Time
tTHL,tTLH
CL = 50pF
2
-
-
75
-
95
-
110
ns
CL = 50pF
4.5
-
-
15
-
19
-
22
ns
CL = 50pF
6
13
16
19
ns
Input Capacitance
CIN
CL = 50pF
-
-
-
10
-
10
-
10
pF
Maximum Clock Frequency
fMAX
CL = 15pF
5
60
MHz
Power Dissipation Capacitance
(Note 3, 4)
CPD
CL = 15pF
5
-
33
-
-
-
-
-
pF
Prerequisite for Switching Specifications
(Continued)
PARAMETER
SYMBOL
VCC (V)
25oC
-40oC TO 85oC
-55oC TO 125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520


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