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UPD4701A Datasheet(PDF) 6 Page - NEC |
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UPD4701A Datasheet(HTML) 6 Page - NEC |
6 / 16 page µPD4701A 6 6. CONNECTION TO CPU SYSTEM An example of connection to a CPU system is shown in Fig. 4. Fig. 4 Example of Connection to CPU System Output Port A1 A0 DB0 - 7 INT FLAG A2 - An and IORD or MRD CPU System CS X/Y U/L SF RIGHT MIDDLE LEFT CF D0 - 7 XA XB YA YB Mouse I/F PD4701A µ RESET Mouse X Y µPD4701A Pin Name Description X/Y Connected to address line A1. U/L Connected to address line A0. CS Connects address lines A2 to An and the signal resulting from decoding IORD in the I/O address mode or MRD in the memory address mode, or an output port. The low level must be maintained during a count data read. D0 to 7 Connected to the data bus. SF, CF When these are used as interrupt signals, they are connected to the CPU INT pin. RESET X These are connected to a CPU output port or reset signal. RESET Y The above connections enable the CPU to read the X counter, Y counter and switch input status. The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. |
Similar Part No. - UPD4701A |
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Similar Description - UPD4701A |
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