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SI9117 Datasheet(PDF) 10 Page - Vishay Siliconix |
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SI9117 Datasheet(HTML) 10 Page - Vishay Siliconix |
10 / 15 page Si9117 Vishay Siliconix www.vishay.com 10 Document Number: 70027 S-40750—Rev. E, 19-Apr-04 Feedback Comparator UV-low VREF 4.6 V 20 mA CSS Error Amp FIGURE 4. Soft-Start Oscillator The oscillator circuit uses external timing components RT and CT. An internal divide-by-two prevents pulses with greater than 50% duty cycle, so that core saturation can be avoided. When the RT terminal is connected to VCC, comparator C2 disconnects the oscillator output from the SYNC terminal using SW1, and allows an external oscillator circuit to take control of the current mode comparator circuit. The current programmed by RT defines the charging current of CT and the on and off times with the following design equations: TON + 1.025 x RT xCT 8 TOFF + 5x Rql xCT FOSC + 1 2 x 1 TON ) TOFF (1) (2) (3) where Rql = 25 W Actual values taken from a prototype board have been plotted (Figure 6), and are a close match (except for 47 pF, where stray parasitics have a more significant effect). In certain circumstances, such as current limiting, it may be desirable to change the frequency of the converter for a period of time to overcome current tails (see Figure 14 for further explanation). With the Si9117, this is easily done by adding or subtracting some current into the RT terminal: D The charging current in CT is set by 8 RT. D The voltage at the RT terminal is 4 V, as supplied by an inter- nal emitter follower from the reference. The frequency can be changed easily by supplying some of the current into RT from the VCC rail, thus “starving” the internal current source, and slowing the frequency down. (See Figure 7.) I1 C1 VREF C2 I2 Q2 B1 B2 B3 SW1 Q1 CT RT U1 DQ Q CLK SYNC FIGURE 5. Oscillator |
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