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S5D4100X Datasheet(PDF) 19 Page - Samsung semiconductor

Part No. S5D4100X
Description  Digital Interface Including Scaler, Image Enhancement
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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S5D4100X Datasheet(HTML) 19 Page - Samsung semiconductor

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DATASHEET
S5D4100X
19
5.2 ITU DECODER
The ITU decoder block divides Y, C and sync signal from the BT656 data via decoding of the input data in
accordance with the protocol.
For BT656 input image, the ITU decoder block selects two channels alternatively. If the value of Register
ITU656_CH is LOW, pins YI7 ~ YI0 are used for BT656 data, VCKI for input clock, and VD for input vertical sync
signal. On the contrary, if the value of Register ITU656_CH is HIGH, pins CI7 ~ CI0 are used for BT656 data, HD
for input clock, and FLD for input vertical sync signal. In other words, for ITU-R BT656, two input sources are used
selectively for image by alternating channels.
For ITU-R BT601 input, the ITU decoder block simply multiplexes the data and the sync signal.
656 Decoder
ITU656_CH
CI7~0
C656
Y+C
YI7~0
VD
HD
0
1
10
0
1
10
10
Y656
10
FLD
V601
FLDi
HDi
VDi
Yi
Ci
Figure 8. ITU Decoder


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