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S5D4100X Datasheet(PDF) 53 Page - Samsung semiconductor |
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S5D4100X Datasheet(HTML) 53 Page - Samsung semiconductor |
53 / 94 page ![]() DATASHEET S5D4100X 53 0x0003 GLOBAL_TEST_PATTERN_SELECT (Default: 0x 00) R/W 7:0 TP_SEL Test Pattern Select The register is used for selection of test pattern. Figure 12 describes the register, and Figure 13 shows the types of patterns available. 0x0004 GLOBAL_TEST_PATTERN_CONST_LEVEL_CONTROL (Default: 0x 00) R/W 7:0 TP_CONST_ LEVEL Constant Test Pattern Level Control The register is enabled when Pattern No. 6 is selected in TP_SEL. The register is used to select a specific level. Details are described in 5.5.2 Test Pat. Gen. 0x0005 GLOBAL_TEST_PATTERN_CONST_WIDTH_CONTROL (Default: 0x 00) R/W 7:0 TP_CONST_ WIDTH Constant Test Pattern Width Control The register is enabled when Pattern No. 6 is selected in TP_SEL. The register is used to select a width of each level. Details are described in 5.5.2 Test Pat. Gen. 0x0006 GLOBAL_INPUT_CLOCK_AND_MASK_CONTROL (Default: 0x 03) R/W 7:4 CKI_DLY Input Clock Delay The register delays the clock selected by ITU656_CH. The most significant bit of the 4 bits is the inversion signal. 3 CKI2_PHASE Changeable 2-Times Scaler Output Clock Phase 0: Normal 1: Phase Reverse 2 CKI_SEL Input Clock Select (See Figure 7 Clock System) 0: CKOSC Select 1: VCK Select 1 BLANK_MASK_ ON Input Blank Data Mask ON/OFF The register masks the blank area to black. 0: Mask OFF 1: Mask ON 0 ROLLING_ MASK_ON Input Rolling Data Mask ON/OFF The register masks the unnecessary image displayed due to rolling at moving of screen position. 0: Mask OFF 1: Mask ON |