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S5D4100X Datasheet(PDF) 38 Page - Samsung semiconductor

Part No. S5D4100X
Description  Digital Interface Including Scaler, Image Enhancement
Download  94 Pages
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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S5D4100X Datasheet(HTML) 38 Page - Samsung semiconductor

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DATASHEET
S5D4100X
38
5.9.10.2 Display RAM Structure
The display RAM has 900 addresses from 0x2000 to 0x2383. In other words, 2 addresses are assigned to a
display RAM cell (900/450 = 2). Since the host interface transmits the data by 8 bits, in order to configure a
display RAM cell of 16 bits, 2 addresses should be transmitted. A display RAM cell is composed as below. In case
of a display Ram cell [15] bit, the INTENSITY function or the HALF_TONE function is selected in accordance with
Register DSRAM_ATTR_CON(0x010C[1]). The remaining one attribute is selected between Register
G_INT(0x010C[0]) and Register G_HT_EN(0x010B[5]).
0
1
2
3
255
18
12
0x2000
0x2001
0x2002
0x2003
0x2004
0x2005
0x2006
0x2007
0x2008
0x2009
0x200A
0x200B
0x200C
0x200D
0x200E
0x200F
0x2010
0x2011
0x2012
0x2013
...
0x2382
0x2383
Font
Number
Display RAM
Font RAM
A
B
C
&
Font Number 3
Font Number 2
Font Number 3
Font Number 0
Font Number 25
Font Number 44
Font Number 100
Font Number 68
Font Number 255
Font Number 210
. . .
Font Number 1
INT or HT
BLINK
TPRA
Font Number
Display RAM Cell
Even Address
Odd Address
BDSH
FC
Figure 28. OSD Font RAM & Display RAM Structure


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