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LP5550 Datasheet(PDF) 16 Page - National Semiconductor (TI) |
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LP5550 Datasheet(HTML) 16 Page - National Semiconductor (TI) |
16 / 25 page R5-R6 - Unused Registers Address 0x5, 0x6 Type R/W Reset Default 8h’00 Bit Field Name Description or Comment 7:00 Unused Write transactions to this register are ignored. Read transactions will return a “No Response Frame.” A no response frame contains all zeros (see PWI 1.0 specification). R7 – VO2 Voltage Register (I/O Voltage) Address 0x7 Type R/W Reset Default 8h’78 Bit Field Name Description or Comment 7 Sign This bit is fixed to ‘0’. Reading this bit will result in a ‘0’. Any data written into this bit position using the Register Write command is ignored. 6:3 Voltage Fixed voltage value. A code of all ones indicates maximum voltage while a code of all zero indicates minimum voltage. Default value is in bold. Voltage Data Code [6:3] Voltage Value (volts) 4h’0 1.5 4h’1 1.5 4h’2 1.5 4h’3 1.5 4h’4 1.6 4h’5 1.7 4h’6 1.8 4h’7 1.9 4h’8 2 4h’9 2.1 4h’A 2.2 4h’B 2.3 4h’C 2.5 4h’D 2.8 4h’E 3 4h’F 3.3 (default) 2:0 Unused These bits are fixed to ‘0’. Reading these bits will result in a ‘000’. Any data written into these bits using the Register Write command is ignored. R8 – VO1 Voltage Register (PLL/Fixed Voltage) Address 0x8 Type R/W Reset Default 8h’28 Bit Field Name Description or Comment 7 Sign This bit is fixed to ‘0’. Reading this bit will result in a ’0’. Any data written into this bit position using the Register Write command is ignored. www.national.com 16 |
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