UPD45128163-E datasheet(6/86 Pages) ELPIDA

Part #	UPD45128163-E

Description	128M-bit Synchronous DRAM 4-bank, LVTTL

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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6 / 86 page

Data Sheet E0728N10 (Ver. 1.0)

6

µPD45128163-E

CONTENTS

1.

Input / Output Pin Function ............................................................................................................. 8

2.

Commands ........................................................................................................................................ 9

3.

Simplified State Diagram ............................................................................................................... 12

4.

Truth Table ...................................................................................................................................... 13

4.1

Command Truth Table ............................................................................................................................ 13

4.2

DQM Truth Table ..................................................................................................................................... 13

4.3

CKE Truth Table ...................................................................................................................................... 13

4.4

Operative Command Table .................................................................................................................... 14

4.5

Command Truth Table for CKE ............................................................................................................. 17

5.

Initialization ..................................................................................................................................... 18

6.

Programming the Mode Register .................................................................................................. 19

7.

Mode Register ................................................................................................................................. 20

7.1

Burst Length and Sequence ................................................................................................................. 21

8.

Address Bits of Bank-Select and Precharge ............................................................................... 22

9.

Precharge ........................................................................................................................................ 23

10. Auto Precharge ............................................................................................................................... 24

10.1

Read with Auto Precharge .................................................................................................................. 24

10.2

Write with Auto Precharge ................................................................................................................. 25

11. Read / Write Command Interval ..................................................................................................... 26

11.1

Read to Read Command Interval ....................................................................................................... 26

11.2

Write to Write Command Interval ....................................................................................................... 26

11.3

Write to Read Command Interval ....................................................................................................... 27

11.4

Read to Write Command Interval ....................................................................................................... 28

12. Burst Termination ........................................................................................................................... 29

12.1

Burst Stop Command ......................................................................................................................... 29

12.2

Precharge Termination ....................................................................................................................... 30

12.2.1

Precharge Termination in READ Cycle ................................................................................... 30

12.2.2

Precharge Termination in WRITE Cycle .................................................................................. 31

Similar Part No. - UPD45128163-E

Manufacturer	Part #	Datasheet	Description
Elpida Memory	UPD45128163-A75L	821Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL
	UPD45128163-I	785Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	UPD45128163-I-E	962Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	UPD45128163-T	774Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

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Similar Description - UPD45128163-E

Manufacturer	Part #	Datasheet	Description
NEC	UPD45128441	1Mb / 92P	128M-bit Synchronous DRAM 4-bank, LVTTL
Elpida Memory	UPD45128163-A75L	821Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL
	PD45128441-T	713Kb / 89P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	UPD45128163-I	785Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	UPD45128163-T	774Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	PD45128441-I	710Kb / 89P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	PD45128163-SU	701Kb / 87P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
	UPD45128163-I-E	962Kb / 86P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
NEC	UPD4564323	1Mb / 84P	64M-bit Synchronous DRAM 4-bank, LVTTL
Elpida Memory	UPD4564163	919Kb / 85P	64M-bit Synchronous DRAM 4-bank, LVTTL

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