SAFC161U datasheet(5/469 Pages) INFINEON

Part #	SAFC161U

Description	Embedded C166 with USB, USART and SSC

Download	469 Pages

Scroll/Zoom	100%

Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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5 / 469 page

C161U

Page

Data Sheet

2001-04-19

Table of Contents

1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.1

Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.3

Pinning Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

1.4

Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

1.4.1

Personal Computer (PC) Peripherals Applications . . . . . . . . . . . . . . . . 16

2

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.1

C161U Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.2

C161U Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.1

Basic CPU Concepts and Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.2

On-Chip System Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

3.3

Clock Generation Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.4

On-Chip Peripheral Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3.5

Protected Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

4

Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

4.1

Internal RAM and SFR Area

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

4.2

External Memory Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

4.3

Crossing Memory Boundaries

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

5

Central Processor Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

5.1

Instruction Pipelining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5.2

Bit-Handling and Bit-Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

5.3

Instruction State Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

5.4

CPU Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

5.5

PEC - Extension of Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

6

DMA - External PEC (EPEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

6.1

EPEC Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

6.2

EPEC Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

6.3

EPEC Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

6.4

EPEC Transfer Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

6.5

Implementation of EPEC Interrupt Generation Unit . . . . . . . . . . . . . . . . . 104

7

Interrupt and Trap Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

7.1

Interrupt System Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

7.2

Interrupt Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

7.3

Operation of the PEC Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

7.4

Prioritization of Interrupt and PEC Service Requests . . . . . . . . . . . . . . . 118

7.5

Saving the Status during Interrupt Service . . . . . . . . . . . . . . . . . . . . . . . . 120

7.6

Interrupt Response Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

7.7

PEC Response Times

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

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