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EDS2532EEBH-75 Datasheet(PDF) 43 Page - Elpida Memory

Part # EDS2532EEBH-75
Description  256M bits SDRAM (8M words x 32 bits)
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDS2532EEBH-75 Datasheet(HTML) 43 Page - Elpida Memory

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EDS2532EEBH-75
Preliminary Data Sheet E0639E50 (Ver. 5.0)
43
Read Cycle/Write Cycle
0
1
2
3
4
5
6
7
8
9
1011
121314
151617
181920
R:a
C:a
R:b
C:b
C:b'
C:b"
a
a+1 a+2 a+3
b
b+1 b+2 b+3 b'
b'+1 b"
b"+1 b"+2 b"+3
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
DQ (output)
DQ (input)
CLK
BS
R:a
C:a
R:b
C:b
C:b'
C:b"
a
a+1 a+2 a+3
b
b+1 b+2 b+3 b'
b'+1 b"
b"+1 b"+2 b"+3
Bank 0
Active
Bank 0
Read
Bank 3
Active
Bank 3
Read
Bank 3
Read
Bank 3
Read
Bank 0
Precharge
Bank 3
Precharge
Bank 0
Active
Bank 0
Write
Bank 3
Active
Bank 3
Write
Bank 3
Write
Bank 3
Write
Bank 0
Precharge
Bank 3
Precharge
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
DQ (input)
DQ (output)
BS
High-Z
High-Z
VIH
Read cycle
/RAS-/CAS delay = 3
/CAS latency = 3
Burst length = 4
= VIH or VIL
Write cycle
/RAS-/CAS delay = 3
/CAS latency = 3
Burst length = 4
= VIH or VIL
VIH
Read/Single Write Cycle
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R:a
C:a
R:b
C:a'
R:a
C:a
C:a
a
a
a
a
Bank 0
Active
Bank 0
Read
Bank 3
Active
Bank 0
Write
Bank 0
Precharge
Bank 3
Precharge
Bank 0
Active
Bank 0
Read
Bank 0
Write
Bank 0
Precharge
R:b
Bank 3
Active
C:a
Bank 0
Read
a
a+1 a+2 a+3
Bank 0
Write
Bank 0
Write
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
DQ (input)
DQ (output)
CLK
BS
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
BS
C:b
bc
a+1
a+3
a+1 a+2 a+3
C:c
VIH
VIH
Read/Single write
/RAS-/CAS delay = 3
/CAS latency = 3
Burst length = 4
=
VIH or VIL
DQ (input)
DQ (output)


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