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EDS1232AATA-75L-E Datasheet(PDF) 48 Page - Elpida Memory

Part # EDS1232AATA-75L-E
Description  128M bits SDRAM (4M words x 32 bits)
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDS1232AATA-75L-E Datasheet(HTML) 48 Page - Elpida Memory

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EDS1232AATA
Data Sheet E0386E40 (Ver. 4.0)
48
Self Refresh Cycle
CLK
CKE
/CS
/RAS
/CAS
/WE
BS
Address
DQM
DQ (input)
DQ (output)
Precharge command
If needed
Self refresh entry
command
Auto
refresh
Self refresh exit
ignore command
or No operation
CKE Low
A10=1
RC
t
RP
t
Self refresh cycle
/RAS-/CAS delay = 3
CL = 3
BL = 4
= VIH or VIL
High-Z
Next
clock
enable
RC
t
Next
clock
enable
lSREX
Self refresh entry
command
Clock Suspend Mode
012
3
4
5
6
7
8
9
1011
1213
141516
171819
20
R:a
C:a
R:b
a
a+1 a+2
a+3
b
b+1 b+2
R:a
C:a R:b
C:b
a
a+1 a+2
b
b+1 b+2 b+3
C:b
Bank0
Active
Active clock
suspend start
Active clock
supend end
Bank0
Read
Bank3
Active
Read suspend
start
Read suspend
end
Bank0
Precharge
Bank3
Read
Earliest Bank3
Precharge
Bank0
Write
Bank0
Active
Active clock
suspend start
Active clock
suspend end
Bank3
Active
Write suspend
start
Write suspend
end
Bank3
Write
Bank0
Precharge
Earliest Bank3
Precharge
b+3
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
CLK
BS
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
BS
a+3
High-Z
High-Z
tHI
tSI
tSI
Read cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
Write cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
DQ (output)
DQ (input)
DQ (output)
DQ (input)


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