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EDD2508AKTA-5 Datasheet(PDF) 37 Page - Elpida Memory

Part No. EDD2508AKTA-5
Description  256M bits DDR SDRAM (32M words x 8 bits, DDR400)
Download  48 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDD2508AKTA-5 Datasheet(HTML) 37 Page - Elpida Memory

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EDD2508AKTA-5
Preliminary Data Sheet E0349E60 (Ver. 6.0)
37
Bank active command interval
Destination row of the consecutive ACT
command
Bank
address
Row address
State
Operation
1. Same
Any
ACTIVE
Two successive ACT commands can be issued at tRC interval. In between two
successive ACT operations, precharge command should be executed.
2. Different
Any
ACTIVE
Precharge the bank. tRP after the precharge command, the consecutive ACT
command can be issued.
IDLE
tRRD after an ACT command, the next ACT command can be issued.
CK
/CK
Command
BA
tRC
Address
ACTV
tRRD
Bank0
Active
Bank3
Active
Bank0
Precharge
Bank0
Active
PRE
ACT
ROW: 0
NOP
NOP
NOP
ACT
ACT
ROW: 1
ROW: 0
Bank Active to Bank Active
Mode register set to Bank-active command interval
The interval between setting the mode register and executing a bank-active command must be no less than tMRD.
CK
/CK
Command
Address
NOP
NOP
MRS
ACT
tMRD
Mode Register Set
Bank3
Active
CODE
BS and ROW


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