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EBD25UC8AKFA-5-E Datasheet(PDF) 11 Page - Elpida Memory

Part No. EBD25UC8AKFA-5-E
Description  256MB Unbuffered DDR SDRAM DIMM (32M words X 64 bits, 1 Rank)
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EBD25UC8AKFA-5-E Datasheet(HTML) 11 Page - Elpida Memory

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EBD25UC8AKFA-5-E
Preliminary Data Sheet E0602E10 (Ver. 1.0)
11
DC Characteristics 1 (TA = 0 to +70°C, VDD = 2.6V ± 0.1V, VSS = 0V)
Parameter
Symbol
Grade
max.
Unit
Test condition
Notes
Operating current (ACTV-PRE)
IDD0
-5B
-5C
880
800
mA
CKE ≥ VIH,
tRC = tRC (min.)
1, 2, 9
Operating current
(ACTV-READ-PRE)
IDD1
-5B
-5C
1120
1040
mA
CKE ≥ VIH, BL = 4,
CL = 3,
tRC = tRC (min.)
1, 2, 5
Idle power down standby current
IDD2P
24
mA
CKE ≤ VIL
4
Floating idle
Standby current
IDD2F
240
mA
CKE ≥ VIH, /CS ≥ VIH
DQ, DQS, DM = VREF
4, 5
Quiet idle
Standby current
IDD2Q
200
mA
CKE ≥ VIH, /CS ≥ VIH
DQ, DQS, DM = VREF
4, 10
Active power down
standby current
IDD3P
160
mA
CKE ≤ VIL
3
Active standby current
IDD3N
480
mA
CKE ≥ VIH, /CS ≥ VIH
tRAS = tRAS (max.)
3, 5, 6
Operating current
(Burst read operation)
IDD4R
1600
mA
CKE ≥ VIH, BL = 2,
CL = 3
1, 2, 5, 6
Operating current
(Burst write operation)
IDD4W
1680
mA
CKE ≥ VIH, BL = 2,
CL = 3
1, 2, 5, 6
Auto refresh current
IDD5
1360
mA
tRFC = tRFC (min.),
Input ≤ VIL or ≥ VIH
Self refresh current
IDD6
24
mA
Input ≥ VDD – 0.2 V
Input ≤ 0.2 V
Operating current
(4 banks interleaving)
IDD7A
2560
mA
BL = 4
1, 5, 6, 7
Notes: 1. These IDD data are measured under condition that DQ pins are not connected.
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one cycle.
6. DQ, DM and DQS transition twice per one cycle.
7. 4 banks active. Only one bank is running at tRC = tRC (min.)
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.
9. Command/Address transition once per one every two clock cycles.
10. Command/Address stable at ≥ VIH or ≤ VIL.
DC Characteristics 2 (TA = 0 to +70°C, VDD, VDDQ = 2.6V ± 0.1V, VSS = 0V)
Parameter
Symbol
min.
max.
Unit
Test condition
Note
Input leakage current
ILI
–16
16
µA
VDD ≥ VIN ≥ VSS
Output leakage current
ILO
–5
5
µA
VDD ≥ VOUT ≥ VSS
Output high current
IOH
–15.2
mA
VOUT = 1.95V
1
Output low current
IOL
15.2
mA
VOUT = 0.35V
1
Note: 1. DDR SDRAM component specification.


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