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74HCT4067D-Q100 Datasheet(PDF) 17 Page - Nexperia B.V. All rights reserved |
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74HCT4067D-Q100 Datasheet(HTML) 17 Page - Nexperia B.V. All rights reserved |
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© Nexperia B.V. 2017. All rights reserved 74HC_HCT4067_Q100 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 1 — 22 May 2015 17 of 27 Nexperia 74HC4067-Q100; 74HCT4067-Q100 16-channel analog multiplexer/demultiplexer [1] For 74HCT4067-Q100: maximum input voltage VI = 3.0 V. Test data is given in Table 12. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 14. Test circuit for measuring switching times Table 12. Test data Test Input Output S1 position Control E Address Sn Switch Yn (Z) tr, tf Switch Z (Yn) VI[1] VI[1] Vis CL RL tPHL, tPLH GND GND or VCC GND to VCC 6ns 50pF - open tPHZ, tPZH GND to VCC GND to VCC VCC 6ns 50pF, 15pF 1k GND tPLZ, tPZL GND to VCC GND to VCC GND 6 ns 50 pF, 15 pF 1 k VCC |
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