74HC4040DB-Q100 datasheet(9/19 Pages) NEXPERIA

Part #	74HC4040DB-Q100

Description	12-stage binary ripple counter

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74HC_HCT4040_Q100

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Product data sheet

Rev. 1 — 24 March 2014

9 of 19

Nexperia

74HC4040-Q100; 74HCT4040-Q100

12-stage binary ripple counter

[1]

tpd is the same as tPHL, tPLH.

[2]

tt is the same as tTHL, tTLH.

[3]

CPD is used to determine the dynamic power dissipation (PD in W).

PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

(C

L  VCC

2

 f

o) = sum of outputs.

CPD

power

dissipation

capacitance

VI =GND to VCC

[3]

-20

-

pF

74HCT4040-Q100

tpd

propagation

delay

CP to Q0; see Figure 8

[1]

VCC = 4.5 V

-

19

40

-

50

-

60

ns

VCC =5.0 V; CL =15pF

-

16

-

ns

Qn to Qn+1; see Figure 8

VCC = 4.5 V

-

10

20

-

25

-

30

ns

VCC =5.0 V; CL =15pF

-

8

-

ns

tPHL

HIGH to LOW

propagation

delay

MR to Qn; see Figure 8

VCC = 4.5 V

-

23

45

-

56

-

68

ns

tt

transition time Qn; see Figure 8

[2]

VCC = 4.5 V

-

7

15

-

19

-

22

ns

tW

pulse width

CP input, HIGH or LOW;

see Figure 8

VCC = 4.5 V

16

7

-

20

-

24

-

ns

MR input, HIGH;

see Figure 8

VCC = 4.5 V

16

6

-

20

-

24

-

ns

trec

recovery time

MR to CP; see Figure 8

VCC = 4.5 V

10

2

-

13

-

15

-

ns

fmax

maximum

frequency

CP input; see Figure 8

VCC = 4.5 V

30

72

-

24

-

20

-

MHz

VCC =5.0 V; CL =15pF

-

79

-

MHz

CPD

power

dissipation

capacitance

VI =GND to VCC

[3]

-20

-

pF

Table 7.

Dynamic characteristics …continued

GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9.

Symbol

Parameter

Conditions

25

C

40 C to +85 C 40 C to +125 C Unit

Min Typ Max

Min

Max

Min

Max

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