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74VHCT32BQ Datasheet(PDF) 1 Page - Nexperia B.V. All rights reserved |
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74VHCT32BQ Datasheet(HTML) 1 Page - Nexperia B.V. All rights reserved |
1 / 14 page ![]() 1. General description The 74VHC32; 74VHCT32 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC32; 74VHCT32 provide the 2-input OR function. 2. Features I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N The 74VHC32 operates with CMOS input level N The 74VHCT32 operates with TTL input level I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information 74VHC32; 74VHCT32 Quad 2-input OR gate Rev. 01 — 13 August 2009 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74VHC32D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74VHCT32D 74VHC32PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74VHCT32PW 74VHC32BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 74VHCT32BQ |
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