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74AHC74-Q100 Datasheet(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74AHC74-Q100 Datasheet(HTML) 8 Page - Nexperia B.V. All rights reserved |
8 / 19 page ![]() © Nexperia B.V. 2017. All rights reserved 74AHC_AHCT74_Q100 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 2 — 21 April 2015 8 of 19 Nexperia 74AHC74-Q100; 74AHCT74-Q100 Dual D-type flip-flop with set and reset; positive-edge trigger 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 9. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max 74AHC74-Q100 tpd propagation delay nCP to nQ, nQ; see Figure 7 [2] VCC = 3.0 V to 3.6 V CL = 15 pF - 5.2 11.9 1.0 14.0 1.0 15.0 ns CL = 50 pF - 7.4 15.4 1.0 17.5 1.0 19.5 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 3.7 7.3 1.0 8.5 1.0 9.5 ns CL = 50 pF - 5.2 9.3 1.0 10.5 1.0 12.0 ns nSD, nRD to nQ, nQ; see Figure 8 VCC = 3.0 V to 3.6 V CL = 15 pF - 5.4 12.3 1.0 14.5 1.0 15.5 ns CL = 50 pF - 7.7 15.8 1.0 18.0 1.0 20.0 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 3.7 7.7 1.0 9.0 1.0 10.0 ns CL = 50 pF - 5.3 9.7 1.0 11.0 1.0 12.5 ns fmax maximum frequency see Figure 7 VCC = 3.0 V to 3.6 V CL =15pF 80 125 - 45 - 45 - MHz CL =50pF 50 75 - 70 - 70 - MHz VCC = 4.5 V to 5.5 V CL = 15 pF 130 170 - 110 - 110 - MHz CL = 50 pF 90 115 - 75 - 75 - MHz tW pulse width CP HIGH or LOW; nSD, nRD LOW; see Figure 7 and Figure 8 VCC = 3.0 V to 3.6 V 6.0 - - 7.0 - 7.0 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns tsu set-up time nD to nCP; see Figure 7 VCC = 3.0 V to 3.6 V 6.0 - - 7.0 - 7.0 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns th hold time nD to nCP; see Figure 7 VCC = 3.0 V to 3.6 V 0.5 - - 0.5 - 0.5 - ns VCC = 4.5 V to 5.5 V 0.5 - - 0.5 - 0.5 - ns trec recovery time nRD to nCP; see Figure 8 VCC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns VCC = 4.5 V to 5.5 V 3.0 - - 3.0 - 3.0 - ns |
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