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DLPC900 Datasheet(PDF) 42 Page - Texas Instruments |
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DLPC900 Datasheet(HTML) 42 Page - Texas Instruments |
42 / 83 page Master Controller Slave Controller 1280 1280 1600 42 DLPC900 DLPS037D – OCTOBER 2014 – REVISED MARCH 2019 www.ti.com Product Folder Links: DLPC900 Submit Documentation Feedback Copyright © 2014–2019, Texas Instruments Incorporated (1) There is no JTAG connection to power or no-connect pins. Table 4. DLPC900 – Signals Not Covered by JTAG (1) SIGNAL NAME PACKAGE BALL HW_TEST_EN M25 MOSC M26 MOSCN N26 USB_DAT_N C5 USB_DAT_P D6 TCK N24 TDI N25 TRSTZ M23 TDO1 N23 TDO2 N22 TMS1 P25 TMS2 P26 7.3.4 Two Controller Considerations When two DLPC900 controllers drive a single high-resolution DLP9000 DMD, each controller is used to drive half of the DMD, as shown in Figure 19. Each controller must operate in two pixels per clock, and the pixel clock must be maintained below the maximum two pixel per clock frequency. Only WQXGA resolution is supported when two DLPC900 controllers are matched with a DLP9000 DMD. Figure 19. Two Controllers Connected to DLP9000 DMD |
Similar Part No. - DLPC900_V01 |
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Similar Description - DLPC900_V01 |
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