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X98014 Datasheet(PDF) 6 Page - Intersil Corporation

Part # X98014
Description  140MHz Triple Video Digitizer with Digital PLL
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X98014 Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN8217.0
June 3, 2005
Th HSYNC d
(
bl l
di
t
ili
) th t th DPLL i l
k d t
Programmable
Width and Polarity
Analog
Video In
P
1
P
2
P
3
P
4
P
5
P
6
P
7
P
8
P
0
P
9
D
0
R
P/GP/BP[7:0]
HS
OUT
8.5 DATACLK Pipeline Latency
R
S/GS/BS[7:0]
P
10
P
11
P
12
D
1
D
2
D
3
HSYNC
IN
The HSYNC edge (programmable leading or trailing) that the DPLL is locked to.
The sampling phase setting determines its relative position to the rest of the AFE’s output signals
DATACLK
t
HSYNCin-to-HSout = 7.5ns + (PHASE/64 +8.5)*tPIXEL
FIGURE 3. 24 BIT OUTPUT MODE
Programmable
Width and Polarity
Analog
Video In
P
1
P
2
P
3
P
4
P
5
P
6
P
7
P
8
P
0
P
9
HS
OUT
8.5 DATACLK Pipeline Latency
P
10
P
11
P
12
HSYNC
IN
The HSYNC edge (programmable leading or trailing) that the DPLL is locked to.
The sampling phase setting determines its relative position to the rest of the AFE’s output signals
DATACLK
G
0 (Yo)
G
1 (Y1)G2 (Y2)
B
0 (Uo)R1 (V1)B2 (U2)
G
P[7:0]
R
P[7:0]
B
P[7:0]
t
HSYNCin-to-HSout = 7.5ns + (PHASE/64 +8.5)*tPIXEL
FIGURE 4. 24 BIT 4:2:2 OUTPUT MODE (FOR YUV SIGNALS)
X98014


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