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LPC47M14X Datasheet(PDF) 4 Page - SMSC Corporation

Part No. LPC47M14X
Description  128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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 4 page
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SMSC DS – LPC47M14X
Page 4
Rev. 03/19/2001
TABLE OF CONTENTS
1
PIN LAYOUT ..........................................................................................................................................................8
2
PIN CONFIGURATION...........................................................................................................................................9
3
DESCRIPTION OF PIN FUNCTIONS...................................................................................................................10
3.1
BUFFER TYPE DESCRIPTIONS...........................................................................................................................14
3.2
PINS THAT REQUIRE EXTERNAL PULLUP RESISTORS ..........................................................................................15
4
BLOCK DIAGRAM ...............................................................................................................................................16
5
POWER FUNCTIONALITY...................................................................................................................................17
5.1
VCC POWER..................................................................................................................................................17
5.1.1
3 Volt Operation / 5 Volt Tolerance.........................................................................................................17
5.2
USB POWER..................................................................................................................................................17
5.3
VTR SUPPORT ...............................................................................................................................................17
5.4
VREF PIN .....................................................................................................................................................17
5.5
INTERNAL PWRGOOD ...................................................................................................................................18
5.6
32.768 KHZ TRICKLE CLOCK INPUT..................................................................................................................18
5.7
TRICKLE POWER FUNCTIONALITY......................................................................................................................18
5.8
MAXIMUM CURRENT VALUES............................................................................................................................19
5.9
POWER MANAGEMENT EVENTS (PME/SCI) ......................................................................................................19
6
FUNCTIONAL DESCRIPTION .............................................................................................................................20
6.1
SUPER I/O REGISTERS....................................................................................................................................20
6.2
HOST PROCESSOR INTERFACE (LPC) ...............................................................................................................20
6.3
LPC INTERFACE .............................................................................................................................................21
6.3.1
LPC Interface Signal Definition...............................................................................................................21
6.3.2
LPC Cycles.............................................................................................................................................21
6.3.3
Field Definitions ......................................................................................................................................21
6.3.4
LFRAME# Usage....................................................................................................................................21
6.3.5
I/O Read and Write Cycles .....................................................................................................................22
6.3.6
DMA Read and Write Cycles ..................................................................................................................22
6.3.7
DMA Protocol .........................................................................................................................................22
6.3.8
Power Management................................................................................................................................22
6.3.9
SYNC Protocol .......................................................................................................................................22
6.3.10
LPC Transfer ..........................................................................................................................................23
6.4
USB HUB FUNCTIONAL DESCRIPTION ...............................................................................................................24
6.4.1
USB Downstream Port Selection............................................................................................................25
6.5
FLOPPY DISK CONTROLLER ....................................................................................................................26
6.5.1
FDC Internal Registers ...........................................................................................................................27
6.5.2
STATUS REGISTER ENCODING ..........................................................................................................37
6.5.3
Instruction Set.........................................................................................................................................43
6.5.4
DATA TRANSFER COMMANDS............................................................................................................50
6.6
SERIAL PORT (UART) ................................................................................................................................60
6.7
INFRARED INTERFACE..............................................................................................................................72
6.8
MPU-401 MIDI UART...................................................................................................................................73
6.8.1
Overview.................................................................................................................................................73
6.8.2
Host Interface .........................................................................................................................................73
6.8.3
MIDI Data Port........................................................................................................................................74
6.8.4
Status Port..............................................................................................................................................74
6.8.5
MPU-401 Command Controller ..............................................................................................................76
6.8.6
MIDI UART .............................................................................................................................................77
6.8.7
MPU-401 Configuration Registers ..........................................................................................................77
6.9
PARALLEL PORT ........................................................................................................................................78
6.9.1
IBM XT/AT Compatible, Bi-Directional and EPP Modes .........................................................................79
6.9.2
Extended Capabilities Parallel Port.........................................................................................................84
6.10
POWER MANAGEMENT .............................................................................................................................94
6.11
SERIAL IRQ .................................................................................................................................................98
6.12
INTERRUPT GENERATING REGISTERS..............................................................................................................101
6.13
8042 KEYBOARD CONTROLLER DESCRIPTION ...................................................................................102
6.13.1
Keyboard Interface ...............................................................................................................................103
6.13.2
External Keyboard and Mouse Interface...............................................................................................104
6.13.3
Keyboard Power Management .............................................................................................................104
6.13.4
Interrupts ..............................................................................................................................................104
6.13.5
Memory Configurations.........................................................................................................................104
6.13.6
Register Definitions...............................................................................................................................105




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