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IDT74ALVCH162721 Datasheet(PDF) 5 Page - Integrated Device Technology

Part No. IDT74ALVCH162721
Description  3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
Download  6 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH162721 Datasheet(HTML) 5 Page - Integrated Device Technology

   
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5
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVCH162721
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
Open
VLOAD
GN D
VCC
Pulse
Generator
D.U.T.
500
500
C L
RT
VIN
VOUT
(1, 2)
ALV C L ink
IN PUT
VIH
0V
VOH
VOL
tPLH1
tSK (x)
OU TPUT 1
OU TPUT 2
tPHL1
tSK (x)
tPLH2
tPHL2
VT
VT
VOH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPH L2 - tPHL1
ALV C Link
SAM E PH AS E
IN PUT TR AN SITIO N
OPPOSITE PH ASE
IN PUT TR AN SITIO N
0V
0V
VOH
VOL
tPLH
tPHL
tPHL
tPLH
OU TPU T
VIH
VT
VT
VIH
VT
ALV C L ink
DATA
IN PUT
0V
0V
0V
0V
tREM
TIMIN G
IN PUT
SYNCHRON O US
CONTROL
tSU
tH
tSU
tH
VIH
VT
VIH
VT
VIH
VT
VIH
VT
ALV C Link
ASYNCHRON O US
CONTROL
LOW -H IGH -LOW
PU LSE
H IGH -LOW -H IGH
PU LSE
VT
tW
VT
ALV C Link
CONTROL
IN PUT
tPLZ
0V
OU TPU T
NORM ALLY
LOW
tPZH
0V
SW ITCH
CLO SE D
OU TPU T
NORM ALLY
HIGH
EN ABLE
D ISABLE
SW ITCH
OPEN
tPHZ
0V
VLZ
VOH
VT
VT
tPZL
VLOAD/2
VLOAD/2
VIH
VT
VOL
VHZ
ALV C L ink
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
SWITCH POSITION
OUTPUT SKEW - TSK (x)
Symbol
VCC(1)= 3.3V±0.3V
VCC(1)= 2.7V
VCC(2)= 2.5V±0.2V
Unit
VLOAD
66
2 x Vcc
V
VIH
2.7
2.7
Vcc
V
VT
1.5
1.5
Vcc / 2
V
VLZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
30
pF
NEW16link
Test
Switch
Open Drain
Disable Low
Enable Low
VLOAD
Disable High
Enable High
GND
All Other tests
Open
NEW16link
DEFINITIONS:
CL=
Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
NOTES:
1. Pulse Generator for All Pulses: Rate
≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate
≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
PULSE WIDTH


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