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A63P06361E-7.5F Datasheet(PDF) 10 Page - AMIC Technology

Part # A63P06361E-7.5F
Description  1M X 36 Bit Synchronous High Speed SRAM with Burst Counter and Flow-through Data Output
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A63P06361E-7.5F Datasheet(HTML) 10 Page - AMIC Technology

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A63P06361
PRELIMINARY
(August, 2005, Version 0.0)
9
AMIC Technology, Corp.
AC Characteristics (0°C ≤ TA ≤ 70°C, VCC = 2.5V+5% or 2.5V-5%)
Symbol
Parameter
-6.5
-7.5
-8.5
Unit
Note
Min.
Max.
Min.
Max.
Min.
Max.
TKC
Clock Cycle Time
7.5
-
8.5
-
10
-
ns
TKH
Clock High Time
2.5
-
2.8
-
3.0
-
ns
TKL
Clock Low Time
2.5
-
2.8
-
3.0
-
ns
TKQ
Clock to Output Valid
-
6.5
-
7.5
-
8.5
ns
tKQX
Clock to Output Invalid
3.0
-
3.0
-
3.0
-
ns
tKQLZ
Clock to Output in Low-Z
2.5
-
2.5
-
2.5
-
ns
5, 6
tKQHZ
Clock to Output in High-Z
-
3.5
-
3.5
-
5.0
ns
5, 6
tOEQ
OE to Output Valid
-
3.5
-
3.5
-
5.0
ns
8
tOELZ
OE to Output in Low-Z
0
-
0
-
0
-
ns
5, 6
tOEHZ
OE to Output in High-Z
-
3.5
-
3.5
-
5.0
ns
5, 6
Setup Times
TAS
Address
1.5
-
2.0
-
2.0
-
ns
7, 9
tADSS
Address Status ( ADSC , ADSP )
1.5
-
2.0
-
2.0
-
ns
7, 9
tADVS
Address Advance ( ADV )
1.5
-
2.0
-
2.0
-
ns
7, 9
tWS
Write Signals
( BW1 , BW2 , BW3 , BW4 , BWE , GW )
1.5
-
2.0
-
2.0
-
ns
7, 9
TDS
Data-in
1.5
-
1.5
-
2.0
-
ns
7, 9
tCES
Chip Enable ( CE , CE2, CE2 )
1.5
-
2.0
-
2.0
-
ns
7, 9
Hold Times
TAH
Address
0.5
0.5
0.5
ns
7, 9
tADSH
Address Status ( ADSC , ADSP )
0.5
0.5
0.5
ns
7, 9
tAAH
Address Advance ( ADV )
0.5
0.5
0.5
ns
7, 9
tWH
Write Signal
( BW1 , BW2 , BW3 , BW4 , BWE , GW )
0.5
0.5
0.5
ns
7, 9
TDH
Data-in
0.5
0.5
0.5
ns
7, 9
tCEH
Chip Enable ( CE , CE2, CE2 )
0.5
0.5
0.5
ns
7, 9


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