A63P0636

PRELIMINARY

(July, 2005, Version 0.0)

13

AMIC Technology, Corp.

Timing Waveforms (continued)

CLK

ADSP

ADSC

ADDRESS

A1

A3

CE

(NOTE *2)

ADV

OE

D(A3)

D(A5)

D(A6)

High-Z

DIN

A2

A4

A5

A6

GW,BWE,

BW1-BW4

(NOTE *3)

High-Z

Q(A1)

Q(A2)

Q(A3)

Q(A4)

Q(A4+1)

Q(A4+2)

Q(A4+3)

DOUT

Back-to-Back READs

Single WRITE

Pass-through

READ

(NOTE *4)

BURST READ

Back-to-Back

WRITEs

(NOTE *1)

Read/Write Timing

Notes:

*1. Q(A4) refers to output from address A4. Q(A4+1) refers to output from the internal burst address immediately

following A4.

*2. Timing for CE2 and CE2 is identical to that for CE . As shown in this diagram, when CE is LOW, CE2 is

LOW and CE2 is HIGH. When CE is HIGH, CE2 is HIGH and CE2 is LOW.

*3. Byte Write enables are decided by means of a Write truth table.

*4. Pass-through occurs when data is first written, then Read in sequence.