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EM78P447NAS Datasheet(PDF) 13 Page - ELAN Microelectronics Corp |
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EM78P447NAS Datasheet(HTML) 13 Page - ELAN Microelectronics Corp |
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13 / 57 page  EM78P447N OTP ROM 0: TCC 1: WDT • Bit 2 (PSR2) ~ Bit 0 (PSR0) TCC/WDT prescaler bits. PSR2 PSR1 PSR0 TCC Rate WDT Rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1:16 1:8 1 0 0 1:32 1:16 1 0 1 1:64 1:32 1 1 0 1:128 1:64 1 1 1 1:256 1:128 3. IOC5 ~ IOC7 (I/O Port Control Register) • "1" put the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output. • IOC5 and IOC7 registers are both readable and writable. 4. IOCB (Wake-up Control Register for Port6) 7 6 5 4 3 2 1 0 /WUE7 /WUE6 /WUE5 /WUE4 /WUE3 /WUE2 /WUE1 /WUE0 • Bit 7 (/WUE7) Control bit is used to enable the wake-up function of P67 pin. • Bit 6 (/WUE6) Control bit is used to enable the wake-up function of P66 pin. • Bit 5 (/WUE5) Control bit is used to enable the wake-up function of P65 pin. • Bit 4 (/WUE4) Control bit is used to enable the wake-up function of P64 pin. • Bit 3 (/WUE3) Control bit is used to enable the wake-up function of P63 pin. • Bit 2 (/WUE2) Control bit is used to enable the wake-up function of P62 pin. • Bit 1 (/WUE1) Control bit is used to enable the wake-up function of P61 pin. • Bit 0 (/WUE0) Control bit is used to enable the wake-up function of P60 pin. 0: Enable internal wake-up. 1: Disable internal wake-up. • IOCB Register is both readable and writable. 5. IOCE (WDT Control Register) 7 6 5 4 3 2 1 0 - ODE WDTE SLPC ROC - - /WUE • Bit 6 (ODE) Control bit is used to enable the open-drain of P76 and P77 pins 0: Disable open-drain output. This specification is subject to change without prior notice. 10.21.2004 (V1.0) 13 |
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