Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

CAT24WC66 Datasheet(PDF) 4 Page - Catalyst Semiconductor

Part No. CAT24WC66
Description  64K-Bit I2C Serial CMOS EEPROM
Download  10 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  CATALYST [Catalyst Semiconductor]
Homepage  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT24WC66 Datasheet(HTML) 4 Page - Catalyst Semiconductor

  CAT24WC66 Datasheet HTML 1Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 2Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 3Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 4Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 5Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 6Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 7Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 8Page - Catalyst Semiconductor CAT24WC66 Datasheet HTML 9Page - Catalyst Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 10 page
background image
CAT24WC66
4
Doc. No. 1037, Rev. H
FUNCTIONAL DESCRIPTION
The CAT24WC66 supports the I2C Bus data transmission
protocol. This Inter-Integrated Circuit Bus protocol defines
any device that sends data to the bus to be a transmitter
and any device receiving data to be a receiver. The
transfer is controlled by the Master device which
generates the serial clock and all START and STOP
conditions for bus access. The CAT24WC66 operates
as a Slave device. Both the Master device and Slave
device can operate as either transmitter or receiver, but
the Master device controls which mode is activated.
PIN DESCRIPTIONS
SCL: Serial Clock
The serial clock input clocks all data transferred into or
out of the device.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to
transfer all data into and out of the device. The SDA pin
is an open drain output and can be wire-ORed with other
open drain or open collector outputs.
A0, A1, A2: Device Address Inputs
These pins are hardwired or left unconnected (for
hardware compatibility with CAT24WC16).
When
hardwired, up to eight CAT24WC66 devices may be
addressed on a single bus system (refer to Device
Addressing ). When the pins are left unconnected, the
default values are zeros.
WP: Write Protect
This input, when tied to GND, allows write operations to
the entire memory. When this pin is tied to Vcc, the top
1/4 array of memory is write protected.
When left
floating, memory is unprotected.
Figure 3. Start/Stop Timing
Figure 2. Write Cycle Timing
Figure 1. Bus Timing
START BIT
SDA
STOP BIT
SCL
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8TH BIT
BYTE n
SCL
SDA
tHIGH
SCL
SDA IN
SDA OUT
tLOW
tF
tLOW
tR
tBUF
tSU:STO
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
tAA
tDH


Html Pages

1  2  3  4  5  6  7  8  9  10 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn