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IC41LV8513-35K Datasheet(PDF) 6 Page - Integrated Circuit Solution Inc |
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IC41LV8513-35K Datasheet(HTML) 6 Page - Integrated Circuit Solution Inc |
6 / 17 page IC41C8513 and IC41LV8513 6 Integrated Circuit Solution Inc. DR028-0A 09/25/2001 ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter Test Condition Speed Min. Max. Unit IIL Input Leakage Current Any input 0V ≤ VIN ≤ Vcc −55 µA Other inputs not under test = 0V IIO Output Leakage Current Output is disabled (Hi-Z) −55 µA 0V ≤ VOUT ≤ Vcc VOH Output High Voltage Level IOH = −5.0 mA with VCC=5V 2.4 − V IOH = −2.0 mA with VCC=3.3V VOL Output Low Voltage Level IOL = 4.2 mA with VCC=5V − 0.4 V IOL = 2 mA with VCC=3.3V ICC1 Standby Current: TTL RAS, CAS ≥ VIH 5V − 2mA 3.3V − 0.5 ICC2 Standby Current: CMOS RAS, CAS ≥ VCC − 0.2V 5V − 1mA 3.3V − 0.5 ICC3 Operating Current: RAS, CAS, -35 − 120 mA Random Read/Write(2,3,4) Address Cycling, tRC = tRC (min.) -50 − 110 Average Power Supply Current -60 − 100 ICC4 Operating Current: RAS = VIL, CAS ≥ VIH -35 − 100 mA Fast Page Mode(2,3,4) tRC = tRC (min.) -50 − 90 Average Power Supply Current -60 − 80 ICC5 Refresh Current: RAS Cycling, CAS ≥ VIH -35 − 120 mA RAS-Only(2,3) tRC = tRC (min.) -50 − 110 Average Power Supply Current -60 − 100 ICC6 Refresh Current: RAS, CAS Cycling -35 − 120 mA CBR(2,3,5) tRC = tRC (min.) -50 − 110 Average Power Supply Current -60 − 100 Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed once each Fast page cycle. 5. Enables on-chip refresh and address counters. |
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