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ComLink™ Series
CY2DL814
Document #: 38-07057 Rev. *A
Page 6 of 8
0.0V
100%
80%
20%
0%
tR
tF
1.4V
1.0V
VI(A)
VI(B)
TPA
TPC
TPB
50
50
Standard Termination
Pulse
Generator
A
B
10pF
Figure 3. Test Circuit and Voltage Definitions for the Differential Output Signal[3,4,5,6]
1
InConfig
LVC M OS / LVTTL
LVTTL/LVCMOS
INPUT A
INPUT B
GND
Figure 4. LVCMOS/LVTTL Single-ended Input Value[7]
In C o n fig
LV PE C L &
LV D S
L V DS/L V PECL
0
Figure 5. LVPECL or LVDS Differential Input Value[8]
Ordering Information
Part Number
Package Type
Product Flow
CY2DL814ZI
16-pin TSSOP
Industrial, –40°C to 85°C
CY2DL814ZIT
16-pin TSSOP–Tape and Reel
Industrial, –40°C to 85°C
CY2DL814SI
16-pin SOIC
Industrial, –40°C to 85°C
CY2DL814SIT
16-pin SOIC–Tape and Reel
Industrial, –40°C to 85°C
CY2DL814ZC
16-pin TSSOP
Commercial, 0°C to 70 °C
CY2DL814ZCT
16-pin TSSOP–Tape and Reel
Commercial, 0°C to 70 °C
CY2DL814SC
16-pin SOIC
Commercial, 0°C to 70 °C
CY2DL814SCT
16-pin SOIC–Tape and Reel
Commercial, 0°C to 70 °C
Notes:
7.
LVCMOS/LVTTL single ended input value. Ground either input: when on the B side then non-inversion takes place. If A side is grounded, the signal becomes
the complement of the input on B side. See Table 4.
8.
LVPECL or LVDS differential input value.
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