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COM20019I Datasheet(PDF) 23 Page - SMSC Corporation |
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COM20019I Datasheet(HTML) 23 Page - SMSC Corporation |
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23 / 65 page  Low Cost ARCNET (ANSI 878.1) Controller with 2K x 8 On-Board RAM SMSC COM20019I Page 23 Rev. 04-15-05 DATASHEET Chapter 6 FUNCTIONAL DESCRIPTION 6.1 MICROSEQUENCER The COM20019I contains an internal microsequencer which performs all of the control operations necessary to carry out the ARCNET protocol. It consists of a clock generator, a 544 x 8 ROM, a program counter, two instruction registers, an instruction decoder, a no-op generator, jump logic, and reconfiguration logic. The COM20019I derives a 625 kHz and a 312.5 kHz clock from the output clock of the Clock Multiplier. These clocks provide the rate at which the instructions are executed within the COM20019I. The 625 kHz clock is the rate at which the program counter operates, while the 312.5 kHz clock is the rate at which the instructions are executed. The microprogram is stored in the ROM and the instructions are fetched and then placed into the instruction registers. One register holds the opcode, while the other holds the immediate data. Once the instruction is fetched, it is decoded by the internal instruction decoder, at which point the COM20019I proceeds to execute the instruction. When a no-op instruction is encountered, the microsequencer enters a timed loop and the program counter is temporarily stopped until the loop is complete. When a jump instruction is encountered, the program counter is loaded with the jump address from the ROM. The COM20019I contains an internal reconfiguration timer which interrupts the microsequencer if it has timed out. At this point the program counter is cleared and the MYRECON bit of the Diagnostic Status Register is set. Table 6.1 - Read Register Summary REGISTER MSB READ LSB ADDR STATUS RI/TRI X/RI X/TA POR TEST RECON TMA TA/ TTA 00 DIAG. STATUS MY- RECON DUPID RCV- ACT TOKEN EXC- NAK TENTID NEW NEXTID X 01 ADDRESS PTR HIGH RD- DATA AUTO- INC X X X A10 A9 A8 02 ADDRESS PTR LOW A7 A6 A5 A4 A3 A2 A1 A0 03 DATA D7 D6 D5 D4 D3 D2 D1 D0 04 SUB ADR X X X X X SUB-AD2 SUB-AD1 SUB- AD0 05 CONFIG- URATION RESET CCHEN TXEN ET1 ET2 BACK- PLANE SUB-AD1 SUB- AD0 06 TENTID TID7 TID6 TID5 TID4 TID3 TID2 TID1 TID0 07-0 NODE ID NID7 NID6 NID5 NID4 NID3 NID2 NID1 NID0 07-1 SETUP1 P1 MODE FOUR NAKS X RCV- ALL CKP3 CKP2 CKP1 SLOW- ARB 07-2 NEXT ID NXT ID7 NXT ID6 NXT ID5 NXT ID4 NXT ID3 NXT ID2 NXT ID1 NXT ID0 07-3 SETUP2 RBUS- TMG X X X EF NO- SYNC RCN- TM1 RCM- TM2 07-4 |
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