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EC103D1 Datasheet(PDF) 1 Page - WeEn Semiconductors |
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EC103D1 Datasheet(HTML) 1 Page - WeEn Semiconductors |
1 / 12 page 1. General description Planar passivated ultra sensitive gate Silicon Controlled Rectifier in a SOT54 (T0-92) plastic package. 2. Features and benefits • Planar passivated for voltage ruggedness and reliability • Ultra sensitive gate 3. Applications • Electronic ballasts • Safety shut down and protection circuits • Sensing circuits • Smoke detectors • Switched Mode Power Supplies 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDRM repetitive peak off- state voltage - - 400 V VRRM repetitive peak reverse voltage - - 400 V ITSM non-repetitive peak on- state current half sine wave; Tj(init) = 25 °C; tp = 10 ms; Fig. 4; Fig. 5 - - 8 A IT(AV) average on-state current half sine wave; Tlead ≤ 92 °C; Fig. 1 - - 0.5 A IT(RMS) RMS on-state current half sine wave; Tlead ≤ 92 °C; Fig. 2; Fig. 3 - - 0.8 A Static characteristics IGT gate trigger current VD = 12 V; IT = 10 mA; Tj = 25 °C; Fig. 7 - 3 12 µA EC103D1 SCR 17 August 2018 Product data sheet |
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