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AS4C8M32MD2A-25BCN Datasheet(PDF) 28 Page - Alliance Semiconductor Corporation

Part # AS4C8M32MD2A-25BCN
Description  8M x 32 Mobile LPDDR2 Synchronous DRAM (SDRAM)
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C8M32MD2A-25BCN Datasheet(HTML) 28 Page - Alliance Semiconductor Corporation

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Temperature Sensor
Mobile LPDDR2 devices feature a temperature sensor whose status can be read from MR4. This sensor can be
used to determine an appropriate refresh rate, determine whether AC timing derating is required in the extended
temperature range, and/or monitor the operating temperature. Either the temperature sensor or the device
operating temperature can be used to determine whether operating temperature requirements are being met (see
Operating Temperature Range table).
Temperature sensor data can be read from MR4 using the mode register read protocol. Upon exiting self-refresh
or power-down, the device temperature status bits will be no older than tTSI.
When using the temperature sensor, the actual device case temperature may be higher than the operating
temperature specification that applies for the standard or extended temperature ranges. For example, TCASE
could be above 85°C when MR4[2:0] equals 011b.
To ensure proper operation using the temperature sensor, applications must accommodate the parameters in the
temperature sensor definitions table.
Table 25. Temperature Sensor Definitions and Operating Conditions
Parameter
Description
Symbol
Min/Max
Value
Unit
System temperature
gradient
Maximum temperature gradient
experienced by the memory device at
the temperature of interest over a
range of 2°C
TempGradient
Max
System-dependent
°C/s
MR4 READ interval
Time period between MR4 READs
from the system
ReadInterval
Max
System-dependent
ms
Temperature sensor
interval
Maximum delay between internal
updates of MR4
tTSI
Max
32
ms
System response
delay
Maximum response time from an MR4
READ to the system response
SysRespDelay
Max
System-dependent
ms
Device temperature
margin
Margin above maximum temperature to
support controller response
TempMargin
Max
2
°C
Moblie LPDDR2 devices accommodate the temperature margin between the point at which the device temperature
enters the extended temperature range and the point at which the controller reconfigures the system accordingly.
To determine the required MR4 polling frequency, the system must use the maximum TempGradient and the
maximum response time of the system according to the following equation:
TempGradient × (ReadInterval + tTSI + SysRespDelay) ≦ 2°C
For example, if TempGradient is 10°C/s and the SysRespDelay is 1ms:
10°C/s * (ReadInterval + 32ms + 1ms) ≦ 2°C
In this case, ReadInterval must not exceed 167ms
DQ Calibration
Mobile LPDDR2 devices feature a DQ Calibration function that outputs one of two predefined system timing
calibration patterns. A Mode Register Read to MR32 (Pattern “A”) or MR40 (Pattern “B”) will return the specified
pattern on DQ[0], DQ[8], DQ[16], and DQ[24] for x32 devices. For x32 devices, DQ[7:1], DQ[15:9], DQ[23:17], and
DQ[31:25] may optionally drive the same information as DQ[0] or may drive 0b during the MRR burst. For LPDDR2
devices, MRR DQ Calibration commands may only occur in the idle state.
Table 26. Data Calibration Pattern Description
Pattern
MR#
Bit Time 0
Bit Time 1
Bit Time 2
Bit Time 3
Pattern A
MR32
1
0
1
0
Pattern B
MR40
0
0
1
1
AS4C8M32MD2A-25BCN
Confidential
- 28 of 75 -
Rev.1.0 Jun. 2018


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