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LTC6903CMS8 Datasheet(PDF) 8 Page - Linear Technology

Part # LTC6903CMS8
Description  1kHz - 68MHz Serial Port Programmable Oscillator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

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LTC6903/LTC6904
8
69034fa
Output Control
The CLK and CLK outputs of the LTC6903/LTC6904 are
individually controllable through the serial port as
described in Table 2 below. The low power mode may also
be accessed through these control bits. It is preferred that
unused outputs be disabled in order to reduce power
dissipation and improve accuracy.
Disabling an unused output will improve accuracy of
operation at frequencies above 1MHz. An unused output
running with no load typically degrades frequency accu-
racy up to 0.2% at 68MHz. An unused output running into
a 5pF load typically degrades frequency accuracy up to
0.5% at 68MHz.
Table 2. Output Configuration
CNF1
CNF0
CLK
CLK
0
0
ON
CLK + 180
°
0
1
OFF
ON
1
0
ON
OFF
1
1
Powered-Down*
*Powered-Down: Wheninthismode,thechipisinalowpowerstateandwillrequireapproximately100
µs
to recover. This is not the same effect as the OE pin, which is fast, but uses more power supply current.
Serial Port Bitmap (LTC6903/LTC6904)
(All serial port register bits default LOW at power up)
Table 3
D15
D14
D13
D12
D11
D10
D9
D8
OCT3
OCT2
OCT1
OCT0
DAC9
DAC8
DAC7
DAC6
D7
D6
D5
D4
D3
D2
D1
D0
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
CNF1
CNF0
D15
D14
D13
D12
D11
D10
D8
D9
D7
D6
D5
D4
D3
D2
D1
D0
SEN
SCK
SDI
6903 TD01
APPLICATIO S I FOR ATIO
Additionally, the LTC6903/LTC6904 is guaranteed to be
monotonic when switching between octaves with the OCT
setting bits. For example, the frequency output with a DAC
setting of “1111111111” and an OCT setting of “1100” will
always be lower than the frequency output with a DAC
setting of “0000000000” and an OCT setting of “1101”.
Linearity at these transition points is typically around
3 LSBs.
Output Loading and Accuracy
Improper loading of the outputs of the LTC6903/LTC6904,
especially with poor power supply bypassing, will result in
accuracy problems. At low frequencies, capacitive loading
of the output is not a concern. At frequencies above 1MHz,
attention should be paid to minimize the capacitive load on
the CLK and CLK pins.
The LTC6903/LTC6904 is designed to drive up to 5pF on
each output with no degradation in accuracy. 5pF is
equivalent to one to two HC series logic inputs. A standard
10x oscilloscope probe usually presents between 10pF
and 15pF of capacitive load.
It is strongly suggested that a high speed buffer is used
when driving more than one or two logic inputs, when
driving a line more than 5 centimeters in length, or a
capacitive load greater than 5pF.
Timing Diagram (LTC6903)


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