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MC10EP29 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. MC10EP29
Description  3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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MC10EP29 Datasheet(HTML) 1 Page - ON Semiconductor

   
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© Semiconductor Components Industries, LLC, 2002
September, 2002 – Rev. 2
1
Publication Order Number:
MC10EP29/D
MC10EP29, MC100EP29
3.3V / 5VECL Dual
Differential Data and Clock
D Flip-Flop With Set and
Reset
The MC10/100EP29 is a dual master–slave flip–flop. The device
features fully differential Data and Clock inputs as well as outputs.
The MC10/100EP29 is functionally equivalent to the
MC10/100EL29. Data enters the master latch when the clock is LOW
and transfers to the slave upon a positive transition on the clock input.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to VEE and the D input will
bias around VCC/2. The outputs will go to a defined state, however the
state will be random based on how the flip flop powers up.
Both flip flops feature asynchronous, overriding Set and Reset
inputs. Note that the Set and Reset inputs cannot both be HIGH
simultaneously.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01
mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Maximum Frequency > 3 GHz Typical
500 ps Typical Propagation Delays
PECL Mode Operating Range: V
CC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: V
CC = 0 V
with VEE = –3.0 V to –5.5 V
Open Input Default State
Safety Clamp on Inputs
MARKING
DIAGRAM*
TSSOP–20
DT SUFFIX
CASE 948E
Device
Package
Shipping
ORDERING INFORMATION
MC10EP29DT
TSSOP–20
75 Units/Rail
MC10EP29DTR2
TSSOP–20 2500 Tape & Reel
xxx = MC10 or 100
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
*For additional information, see Application Note
AND8002/D
xxx
EP29
ALYW
20
1
MC100EP29DT
TSSOP–20
75 Units/Rail
MC100EP29DTR2 TSSOP–20 2500 Tape & Reel
1
20
http://onsemi.com


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