Integrated L1-Band GPS Receiver

8

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Detailed Register Definitions

Table 4. Detailed Register Definition for Write Address 0100: SYNTH

DATA BIT

DEFAULT

DESCRIPTION

D15

1

Reserved

D14

1

LPF Autotune Initiate: I = Initiate autotune, 0 = Manual tuning.

D13–D10

0100

LPF Tuning Word: 0000 ~ 7.7MHz, 1111 ~ 2.9MHz.

D9

1

XTAL Clock Select: 1 = External reference, 0 = Synthesized 16.8MHz.

D8

0

Standby: 0 = Normal operating mode, 1 = Standby (oscillator remains active), but only if D9 = 1.

D7–D0

01100000

Table 5. Detailed Register Definition for Write Address 0101: CONFIG 1

DATA BIT

DEFAULT

DESCRIPTION

D15

1

ADC Mode. Select 1 for 1-bit magnitude and sign, select 0 for 2-bit magnitude and sign.

1: GPSIF2 = sign, GPSIF1 = magnitude, GPSIF0 = X

0: GPSIF2 = MSB magnitude, GPSIF1 = LSB magnitude, GPSIF0 = sign

D14–D11

0000

ADC Offset Control (approx 4mV/step): D14 = LSB, D12 = MSB, D11 = sign.

D10

0

Double Charge-Pump Current: 0 = 100µA, 1 = 200µA.

D9 to D8

00

Digital Test Bus Mode Select. See Table 9 for test-mode descriptions.

D7 to D5

001

VCO Coarse Tuning Range. 000 = Lowest frequency, 111 = Highest frequency.

D4–D0

11111

AGC Gain. Digital control of the AGC amplifier in the 2nd IF section. 00000 => min gain, 11111 =>

max gain (linear gain ~2.5dB per unit SPI word).

Table 6. Detailed Register Definition for Write Address 0110: CONFIG 2

DATA BIT

DEFAULT

DESCRIPTION

D15

1

Reset CMOS: 0 = Hold CMOS dividers in reset and PFD is tri-stated, 1 = Inactive.

D14

1

Drive VCO Low: 0 = Active, forces VCO to lowest frequency.

N.B. do not activate both D14 and D13 at the same time.

D13

1

Active, forces VCO to highest frequency. N.B. do not activate both D14 and D13 at the same time.

D12–D7

100000

Reserved

D6 to D5

11

Must be programmed to 11

D4–D0

11111

Analog Test Mode Select: Reserved