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AD9877 Datasheet(PDF) 9 Page - Analog Devices |
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AD9877 Datasheet(HTML) 9 Page - Analog Devices |
9 / 36 page AD9877 Rev. B | Page 9 of 36 Pin No. Mnemonic Description 59 DGNDOSC Oscillator Digital Ground. 62 DVDDOSC Oscillator Digital 3.3 V Supply. 66 DVDDSD Σ-Δ Digital 3.3 V Supply. 69 DGNDSD Σ-Δ Digital Ground. 73 AVDDIQ 8-Bit ADC Analog 3.3 V Supply. 74, 77, 80 AGNDIQ 8-Bit ADC Analog Ground. 83, 88, 91, 96, 99 AGND 12-Bit ADC Analog Ground. 4:15 IF[11:0] 12-Bit ADC Digital Output. 16:19 RxIQ[3:0] Muxed I and Q ADC Output. 20 RxSYNC Sync Output, IF, I, and Q ADCs. 23 MCLK Master Clock Output. 26 TxSYNC Sync Input for Transmit Port. 27:32 TxIQ[5:0] Digital Input for Transmit Port. 35, 36 PROFILE[1:0] Profile Selection Inputs. 37 RESET Chip Reset Input. 41 SCLK SPORT Clock. 42 CS SPORT Chip Select. 43 SDIO SPORT Data I/O. 44 SDO SPORT Data Output. 47 PWRDN Power-Down Transmit Path. 48 REFIO TxDAC Decoupling (to AGND). 49 FSADJ DAC Output Adjust (External Resistor). 51, 52 Tx−, Tx+ Tx Path Complementary Outputs. 57 PLLFILT PLL Loop Filter Connection. 60 XTAL Crystal Oscillator Inverse Output. 61 OSCIN Oscillator Clock Input. 63 CA_CLK Serial Clock to Cable Driver. 64 CA_DATA Serial Data to Cable Driver. 65 CA_EN Serial Enable to Cable Driver. 67 SDELTA1 Σ-Δ Output Stream1. 68 SDELTA0 Σ-Δ Output Stream0. 71 REFCLK Programmable Reference Clock Output. 75, 76, 89, 90, 100 NC No Connect (Leave Floating). 78, 79 I IN−, I IN+ Differential Input to I ADC. 81, 82 Q IN−, Q IN+ Differential Input to Q ADC. 85 REFB8 8-Bit ADC Decoupling Node. 86 REFT8 8-Bit ADC Decoupling Node. 93 REFB12 12-Bit ADC Decoupling Node. 94 REFT12 12-Bit ADC Decoupling Node. 97, 98 IF12−, IF12+ Differential Input to IF ADC. |
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